R0K572030S000BE Renesas Electronics America, R0K572030S000BE Datasheet - Page 1137

KIT DEV FOR SH7203

R0K572030S000BE

Manufacturer Part Number
R0K572030S000BE
Description
KIT DEV FOR SH7203
Manufacturer
Renesas Electronics America
Series
Renesas Starter Kits (RSK)r
Type
MCUr
Datasheets

Specifications of R0K572030S000BE

Contents
CPU Board, LCD Module, E10A-Lite Emulator, Cable, QuickStart Guide and CD-ROM
Silicon Manufacturer
Renesas
Kit Contents
Board
Silicon Family Name
SH7203
Silicon Core Number
R5S72030W200FP
Tool / Board Applications
General Purpose MCU, MPU, DSP, DSC
Mcu Supported Families
SH7203
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
For Use With/related Products
SH7203
Lead Free Status / Rohs Status
Compliant
23.3.2
SYSSTS is a register that monitors the line status (D+ and D− lines) of the USB data bus.
This register is initialized by a power-on reset, a software reset, or a USB bus reset.
Initial value:
Bit
15 to 11 ⎯
10
9 to 6
5
4 to 2
R/W:
Bit:
System Configuration Status Register (SYSSTS)
Bit Name
SOFEN
15
R
0
-
14
R
0
-
13
R
0
-
Initial
Value
All 0
1
All 0
0
All 0
12
R
0
-
11
R
0
-
R/W
R
R
R
R
R
10
R
1
-
R
9
0
-
Description
Reserved
These bits are always read as 0. The write value
should always be 0.
Reserved
The read value is undefined. This bit cannot be
modified.
Reserved
These bits are always read as 0. The write value
should always be 0.
SOF Issuance Enable
Indicates whether SOF issuance by this module
internal circuit is enabled or disabled, after the UACT
bit in DVSTCTR is written to by software in host
mode operation.
0: SOF issuance to the USB port is disabled.
1: SOF issuance to the USB port is enabled.
Reserved
These bits are always read as 0. The write value
should always be 0.
R
8
0
-
Section 23 USB 2.0 Host/Function Module (USB)
R
7
0
-
Rev. 3.00 Sep. 28, 2009 Page 1105 of 1650
R
6
0
-
SOFEN
R
5
0
R
4
0
-
R
3
0
-
REJ09B0313-0300
R
2
0
-
R
1
LNST[1:0]
*
R
0
*

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