R0K572030S000BE Renesas Electronics America, R0K572030S000BE Datasheet - Page 1036

• Manufacturer Part Number: R0K572030S000BE
• Description: KIT DEV FOR SH7203
• Manufacturer: Renesas Electronics America
• Series: Renesas Starter Kits (RSK)r
• Type: MCUr

Specifications of R0K572030S000BE

• Contents: CPU Board, LCD Module, E10A-Lite Emulator, Cable, QuickStart Guide and CD-ROM
• Silicon Manufacturer: Renesas
• Kit Contents: Board
• Silicon Family Name: SH7203
• Silicon Core Number: R5S72030W200FP
• Tool / Board Applications: General Purpose MCU, MPU, DSP, DSC
• Mcu Supported Families: SH7203
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• For Use With/related Products: SH7203
• Lead Free Status / Rohs Status: Compliant

Section 19 Controller Area Network (RCAN-TL1)
If, at any time, a reference message cannot be detected on the CAN Bus, and the cycle time
CYCTR reaches TCMR2, RCAN-TL1 automatically aborts all pending transmissions (including
the Reference Message).
The following is the sequence to request further transmission in Time Triggered mode.
S/W has to ensure that a message is updated before a Tx trigger for transmission occurs.
When the CYCTR reaches to TTT (Tx-Trigger Time) of a Mailbox and CCR matches with the
programmed cycle for transmission, RCAN-TL1 immediately transfers the message into the Tx
buffer. At this point, RCAN-TL1 will attempt a transmission within the specified Time Enable
Window. If RCAN-TL1 misses this time slot, it will suspend the transmission request up to the
next Tx Trigger, keeping the corresponding TXPR bit set to ‘1’ if the transmission is periodic
(Mailbox-24 to 30). There are three factors that may cause RCAN-TL1 to miss the time slot –
1. The CAN bus currently used
2. An error on the CAN bus during the time triggered message transmission
3. Arbitration loss during the time triggered message transmission
Rev. 3.00 Sep. 28, 2009 Page 1004 of 1650
REJ09B0313-0300
Idle (wait for Time-Trigger)
Transmission Start
Compare match
Bus Idle?
No Arbitration on Bus
Yes
Figure 19.21 Message transmission request
No
Update data before next match
Mailbox[x] is ready
of Tx-Trigger Time
to be updated for
next transmission
Clear TXACK[x]
TXACK[x] = 1 ?
IRR8 = 1 ?
Yes
End Of Frame
No
No
CAN Bus
Waiting for
Waiting for
Interrupt
Interrupt