R0K572030S000BE Renesas Electronics America, R0K572030S000BE Datasheet - Page 1454

KIT DEV FOR SH7203

R0K572030S000BE

Manufacturer Part Number
R0K572030S000BE
Description
KIT DEV FOR SH7203
Manufacturer
Renesas Electronics America
Series
Renesas Starter Kits (RSK)r
Type
MCUr
Datasheets

Specifications of R0K572030S000BE

Contents
CPU Board, LCD Module, E10A-Lite Emulator, Cable, QuickStart Guide and CD-ROM
Silicon Manufacturer
Renesas
Kit Contents
Board
Silicon Family Name
SH7203
Silicon Core Number
R5S72030W200FP
Tool / Board Applications
General Purpose MCU, MPU, DSP, DSC
Mcu Supported Families
SH7203
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
For Use With/related Products
SH7203
Lead Free Status / Rohs Status
Compliant
Section 28 Power-Down Modes
28.2.14 Retention On-Chip RAM Trimming Register (DSRTR)
DSRTR is an 8-bit readable/writable register used to trim the standby current for the on-chip RAM
for data retention in deep standby mode. Only byte access is valid.
To retain data on the on-chip RAM for data retention in deep standby mode, be sure to write H'09
to this register before making a transition to deep standby mode.
This register is initialized after the assertion of the RES pin or exit from deep standby mode.
Note: When writing to this register, see section 28.4, Usage Notes.
Rev. 3.00 Sep. 28, 2009 Page 1422 of 1650
REJ09B0313-0300
Bit
7
6 to 0
Bit Name
TRMD[6:0]
Initial value:
Initial
Value
0
All 0
R/W:
Bit:
R
7
0
-
R/W
R
R/W
R/W
6
0
R/W
Description
Reserved
This bit is always read as 0. The write value should
always be 0.
Retention On-Chip RAM Trimming Data
These bits trim the standby current for the on-chip
RAM for data retention in deep standby mode.
5
0
R/W
4
0
TRMD[6:0]
R/W
3
0
R/W
2
0
R/W
1
0
R/W
0
0

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