R0K572030S000BE Renesas Electronics America, R0K572030S000BE Datasheet - Page 863

Manufacturer Part Number

R0K572030S000BE

KIT DEV FOR SH7203

Manufacturer

Renesas Electronics America

Renesas Starter Kits (RSK)r

CPU Board, LCD Module, E10A-Lite Emulator, Cable, QuickStart Guide and CD-ROM

Silicon Manufacturer

Kit Contents

Silicon Family Name

Silicon Core Number

R5S72030W200FP

Tool / Board Applications

General Purpose MCU, MPU, DSP, DSC

Mcu Supported Families

Lead Free Status / RoHS Status

Contains lead / RoHS non-compliant

For Use With/related Products

Lead Free Status / Rohs Status

The SSU operation can be disabled or enabled using the standby control register. The initial

setting is for SSU operation to be halted. Access to registers is enabled by clearing module

standby mode. For details, refer to section 28, Power-Down Modes.

During continuous transmission or reception in SSU slave mode, negate (drive high level) the SCS

pin once per frame. Correct transmission and reception are not possible if the SCS pin is asserted

(low level) for more than one frame.

In the master transmission operation or the master transmission/reception operation of SSU mode,

please operate one of the following three ways.

(1) Write the next transmission data to the SSTDR after the TDRE bit of the SSSR is set to 1 and

(2) Write the next transmission data to the SSTDR after the TEND bit of the SSSR is set to 1.

(3) Set the SSCR2 as “TENDSTS = 0” or “TENDSTS = 1 and SCSATS = 1”.

before the transmission of one bit before the last bit starts.

Module Standby Mode Setting

Note on Continuous Transmission/Reception in SSU Slave Mode

Note in the Master Transmission Operation or the Master Transmission/Reception

Operation of SSU Mode

Section 16 Synchronous Serial Communication Unit (SSU)

Rev. 3.00 Sep. 28, 2009 Page 831 of 1650

REJ09B0313-0300