R0K572030S000BE Renesas Electronics America, R0K572030S000BE Datasheet - Page 336

Manufacturer Part Number

R0K572030S000BE

KIT DEV FOR SH7203

Manufacturer

Renesas Electronics America

Renesas Starter Kits (RSK)r

CPU Board, LCD Module, E10A-Lite Emulator, Cable, QuickStart Guide and CD-ROM

Silicon Manufacturer

Kit Contents

Silicon Family Name

Silicon Core Number

R5S72030W200FP

Tool / Board Applications

General Purpose MCU, MPU, DSP, DSC

Mcu Supported Families

Lead Free Status / RoHS Status

Contains lead / RoHS non-compliant

For Use With/related Products

Lead Free Status / Rohs Status

Section 9 Bus State Controller (BSC)

For access to a normal space, this LSI uses strobe signal output in consideration of the fact that

mainly static RAM will be directly connected. When using SRAM with a byte-selection pin, see

section 9.5.8, SRAM Interface with Byte Selection. Figure 9.2 shows the basic timings of normal

space access. A no-wait normal access is completed in two cycles. The BS signal is asserted for

one cycle to indicate the start of a bus cycle.

There is no access size specification when reading. The correct access start address is output in the

least significant bit of the address, but since there is no access size specification, 32 bits are always

Rev. 3.00 Sep. 28, 2009 Page 304 of 1650

REJ09B0313-0300

Basic Timing

Normal Space Interface

Figure 9.2 Normal Space Basic Access Timing (Access Wait 0)

Note: * The waveform for DACKn is when active low is specified.