R0K572030S000BE Renesas Electronics America, R0K572030S000BE Datasheet - Page 1111

KIT DEV FOR SH7203

R0K572030S000BE

Manufacturer Part Number
R0K572030S000BE
Description
KIT DEV FOR SH7203
Manufacturer
Renesas Electronics America
Series
Renesas Starter Kits (RSK)r
Type
MCUr
Datasheets

Specifications of R0K572030S000BE

Contents
CPU Board, LCD Module, E10A-Lite Emulator, Cable, QuickStart Guide and CD-ROM
Silicon Manufacturer
Renesas
Kit Contents
Board
Silicon Family Name
SH7203
Silicon Core Number
R5S72030W200FP
Tool / Board Applications
General Purpose MCU, MPU, DSP, DSC
Mcu Supported Families
SH7203
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
For Use With/related Products
SH7203
Lead Free Status / Rohs Status
Compliant
22.3.11 Data FIFO Register (FLDTFIFO)
FLDTFIFO is used to read or write the data FIFO area.
In DMA transfer, data in this register must be specified as the destination (source). When
transferring 16-byte DMA, access FLDTFIFO from the address on the 16-byte address boundary.
Note that the direction of read or write specified by the SELRW bit in FLCMDCR must match
that specified in this register. When changing the read/write direction, FLDTFIFO should be
cleared by setting the AC0CLR bit in FLINTDMACR before use.
Initial value:
Initial value:
Bit
31 to 0
R/W:
R/W:
Bit:
Bit:
Bit Name
DTFO[31:0] H'xxxxxxxx R/W
R/W
R/W
31
15
-
-
R/W
R/W
30
14
-
-
R/W
R/W
29
13
-
-
Initial
Value
R/W
R/W
28
12
-
-
R/W
R/W
27
11
-
-
R/W
R/W
R/W
26
10
-
-
Description
Data FIFO Area Read/Write Data
In write: Data is written to the data FIFO area.
In read: Data in the data FIFO area is read.
R/W
R/W
25
9
-
-
Section 22 AND/NAND Flash Memory Controller (FLCTL)
R/W
R/W
DTFO[31:16]
DTFO[15:0]
24
8
-
-
R/W
R/W
23
7
-
-
Rev. 3.00 Sep. 28, 2009 Page 1079 of 1650
R/W
R/W
22
6
-
-
R/W
R/W
21
5
-
-
R/W
R/W
20
4
-
-
R/W
R/W
19
3
-
-
REJ09B0313-0300
R/W
R/W
18
2
-
-
R/W
R/W
17
1
-
-
R/W
R/W
16
0
-
-

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