R0K572030S000BE Renesas Electronics America, R0K572030S000BE Datasheet - Page 1452

• Manufacturer Part Number: R0K572030S000BE
• Description: KIT DEV FOR SH7203
• Manufacturer: Renesas Electronics America
• Series: Renesas Starter Kits (RSK)r
• Type: MCUr

Specifications of R0K572030S000BE

• Contents: CPU Board, LCD Module, E10A-Lite Emulator, Cable, QuickStart Guide and CD-ROM
• Silicon Manufacturer: Renesas
• Kit Contents: Board
• Silicon Family Name: SH7203
• Silicon Core Number: R5S72030W200FP
• Tool / Board Applications: General Purpose MCU, MPU, DSP, DSC
• Mcu Supported Families: SH7203
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• For Use With/related Products: SH7203
• Lead Free Status / Rohs Status: Compliant

Section 28 Power-Down Modes
28.2.13 Deep Standby Cancel Source Flag Register (DSFR)
DSFR is a 16-bit readable/writable register composed of two types of bits. One is the flag that
confirms which interrupt canceled deep standby mode. The other is the bit that releases the state of
pins after canceling deep standby mode. When deep standby mode is canceled by an interrupt
(NMI or IRQ) or a manual reset, this register retains the previous data although power-on reset
exception handling is executed. When deep standby mode is canceled by a power-on reset, this
register is initialized to H’0000. Only word access is valid.
All flags must be cleared immediately before transition to deep standby mode.
Note: When writing to this register, see section 28.4, Usage Notes.
Initial value:
Rev. 3.00 Sep. 28, 2009 Page 1420 of 1650
REJ09B0313-0300
Bit
15
14 to 10
9
R/W:
Bit:
R/(W)
KEEP
15
Bit Name
IOKEEP
⎯
MRESF
IO
0
14
R
0
-
13
R
0
-
Initial
Value
0
All 0
0
12
R
0
-
11
R
0
-
R/W
R/(W)
R
R/(W)
10
R
0
-
MRESF NMIF
R/(W) R/(W) R/(W) R/(W) R/(W) R/(W) R/(W) R/(W) R/(W) R/(W)
Description
Release of Pin State Retention
Releases the retention of the pin state after canceling
deep standby mode
0: Pin state not retained
[Clearing condition]
Writing 0
1: Pin state retained
[Setting condition]
When deep standby mode is entered
Reserved
These bits are always read as 0. The write value
should always be 0.
MRES Flag
0: No interrupt on MRES pin
1: Interrupt on MRES pin
9
0
8
0
IRQ7F IRQ6F IRQ5F IRQ4F IRQ3F IRQ2F IRQ1F IRQ0F
7
0
6
0
5
0
4
0
3
0
2
0
1
0
0
0