R0K572030S000BE Renesas Electronics America, R0K572030S000BE Datasheet - Page 1125

KIT DEV FOR SH7203

R0K572030S000BE

Manufacturer Part Number
R0K572030S000BE
Description
KIT DEV FOR SH7203
Manufacturer
Renesas Electronics America
Series
Renesas Starter Kits (RSK)r
Type
MCUr
Datasheets

Specifications of R0K572030S000BE

Contents
CPU Board, LCD Module, E10A-Lite Emulator, Cable, QuickStart Guide and CD-ROM
Silicon Manufacturer
Renesas
Kit Contents
Board
Silicon Family Name
SH7203
Silicon Core Number
R5S72030W200FP
Tool / Board Applications
General Purpose MCU, MPU, DSP, DSC
Mcu Supported Families
SH7203
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
For Use With/related Products
SH7203
Lead Free Status / Rohs Status
Compliant
22.4.7
The FLCTL can read the status register of an AND-type or NAND-type flash memory. The data in
the status register of an AND-type or NAND-type flash memory is input through the I/O7 to I/O0
pins and stored in the bits STAT[7:0] in FLBSYCNT. The bits STAT[7:0] in FLBSYCNT can be
read by the CPU. If a program error or erase error is detected when the status register value is
stored in the bits STAT[7:0] in FLBSYCNT, the STERB bit in FLINTDMACR is set to 1 and
generates an interrupt to the CPU if the STERINTE bit in FLINTDMACR is enabled.
(1)
The status register of AND-type flash memory can be read by asserting the output enable signal
OE (OE = 0). If programming is executed in command access mode or sector access mode while
the DOSR bit in FLCMDCR is set to 1, the FLCTL automatically asserts the OE signal and reads
the status register of AND-type flash memory. When the status register of AND-type flash
memory is read, the I/O7 to I/O0 pins indicate the following information as described in table
22.3.
Table 22.3 Status Read of AND-Type Flash Memory
I/O
I/O7
I/O6
I/O5
I/O4
I/O3 to I/O0
Status Read of AND-Type Flash Memory
Status Read
Status (definition)
Reserved
Program check
Reserved
Ready/busy
Erase check
Description
0: Busy state
1: Ready state
0: Pass (erased)
1: Fail (erase failure)
0: Pass (programmed)
1: Fail (program failure)
Section 22 AND/NAND Flash Memory Controller (FLCTL)
Rev. 3.00 Sep. 28, 2009 Page 1093 of 1650
REJ09B0313-0300

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