R0K572030S000BE Renesas Electronics America, R0K572030S000BE Datasheet - Page 1056

KIT DEV FOR SH7203

R0K572030S000BE

Manufacturer Part Number
R0K572030S000BE
Description
KIT DEV FOR SH7203
Manufacturer
Renesas Electronics America
Series
Renesas Starter Kits (RSK)r
Type
MCUr
Datasheets

Specifications of R0K572030S000BE

Contents
CPU Board, LCD Module, E10A-Lite Emulator, Cable, QuickStart Guide and CD-ROM
Silicon Manufacturer
Renesas
Kit Contents
Board
Silicon Family Name
SH7203
Silicon Core Number
R5S72030W200FP
Tool / Board Applications
General Purpose MCU, MPU, DSP, DSC
Mcu Supported Families
SH7203
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
For Use With/related Products
SH7203
Lead Free Status / Rohs Status
Compliant
Section 20 A/D Converter (ADC)
20.3.2
ADCSR is a 16-bit readable/writable register that selects the mode, controls the A/D converter,
and enables or disables starting of A/D conversion by external trigger input.
Rev. 3.00 Sep. 28, 2009 Page 1024 of 1650
REJ09B0313-0300
Initial value:
Bit
15
14
Note:
R/W:
Bit:
*
A/D Control/Status Register (ADCSR)
Only 0 can be written to clear the flag after 1 is read.
R/(W)* R/W
Bit Name
ADF
ADIE
ADF ADIE ADST
15
0
14
0
R/W
13
0
Initial
Value
0
0
12
R
0
-
R/W
11
R/W
R/(W)* A/D End Flag
R/W
0
R/W
TRGS[3:0]
10
0
Description
Status flag indicating the end of A/D conversion.
[Clearing conditions]
[Setting conditions]
A/D Interrupt Enable
Enables or disables the interrupt (ADI) requested at
the end of A/D conversion. Set the ADIE bit while A/D
conversion is not being made.
0: A/D end interrupt request (ADI) is disabled
1: A/D end interrupt request (ADI) is enabled
R/W
9
0
Cleared by reading ADF while ADF = 1, then
writing 0 to ADF
Cleared when DMAC is activated by ADI interrupt
and ADDR is read
A/D conversion ends in single mode
A/D conversion ends for the selected channels in
multi mode
A/D conversion ends for the selected channels in
scan mode
R/W
8
0
R/W
CKS[1:0]
7
0
R/W
6
1
R/W
5
0
MDS[2:0]
R/W
4
0
R/W
3
0
R/W
2
0
CH[2:0]
R/W
1
0
R/W
0
0

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