R0K572030S000BE Renesas Electronics America, R0K572030S000BE Datasheet - Page 24

• Manufacturer Part Number: R0K572030S000BE
• Description: KIT DEV FOR SH7203
• Manufacturer: Renesas Electronics America
• Series: Renesas Starter Kits (RSK)r
• Type: MCUr

Specifications of R0K572030S000BE

• Contents: CPU Board, LCD Module, E10A-Lite Emulator, Cable, QuickStart Guide and CD-ROM
• Silicon Manufacturer: Renesas
• Kit Contents: Board
• Silicon Family Name: SH7203
• Silicon Core Number: R5S72030W200FP
• Tool / Board Applications: General Purpose MCU, MPU, DSP, DSC
• Mcu Supported Families: SH7203
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• For Use With/related Products: SH7203
• Lead Free Status / Rohs Status: Compliant

19.2 Architecture ....................................................................................................................... 915
19.3 Programming Model - Overview ....................................................................................... 919
19.4 Application Note................................................................................................................ 988
19.5 Interrupt Sources.............................................................................................................. 1013
19.6 DMAC Interface .............................................................................................................. 1014
19.7 CAN Bus Interface........................................................................................................... 1015
19.8 Setting I/O Ports for RCAN-TL1..................................................................................... 1016
19.9 Usage Notes ..................................................................................................................... 1018
Section 20 A/D Converter (ADC) ...................................................................1019
20.1 Features............................................................................................................................ 1019
20.2 Input/Output Pins............................................................................................................. 1021
20.3 Register Descriptions ....................................................................................................... 1022
20.4 Operation ......................................................................................................................... 1028
20.5 Interrupt Sources and DMAC Transfer Request .............................................................. 1039
20.6 Definitions of A/D Conversion Accuracy........................................................................ 1040
20.7 Usage Notes ..................................................................................................................... 1041
Rev. 3.00 Sep. 28, 2009 Page xxii of xxx
REJ09B0313-0300
19.1.3 Audience............................................................................................................... 913
19.1.4 References............................................................................................................. 913
19.1.5 Features................................................................................................................. 914
19.3.1 Memory Map ........................................................................................................ 919
19.3.2 Mailbox Structure ................................................................................................. 921
19.3.3 RCAN-TL1 Control Registers .............................................................................. 938
19.3.4 RCAN-TL1 Mailbox Registers............................................................................. 959
19.3.5 Timer Registers..................................................................................................... 974
19.4.1 Test Mode Settings ............................................................................................... 988
19.4.2 Configuration of RCAN-TL1 ............................................................................... 990
19.4.3 Message Transmission Sequence.......................................................................... 995
19.4.4 Message Receive Sequence ................................................................................ 1009
19.4.5 Reconfiguration of Mailbox................................................................................ 1011
19.9.1 Notes on Port Setting for Multiple Channels Used as Single Channel ............... 1018
20.3.1 A/D Data Registers A to H (ADDRA to ADDRH) ............................................ 1023
20.3.2 A/D Control/Status Register (ADCSR) .............................................................. 1024
20.4.1 Single Mode........................................................................................................ 1028
20.4.2 Multi Mode ......................................................................................................... 1031
20.4.3 Scan Mode .......................................................................................................... 1033
20.4.4 A/D Converter Activation by External Trigger or MTU2 .................................. 1036
20.4.5 Input Sampling and A/D Conversion Time ........................................................ 1036
20.4.6 External Trigger Input Timing............................................................................ 1038
20.7.1 Module Standby Mode Setting ........................................................................... 1041