R0K572030S000BE Renesas Electronics America, R0K572030S000BE Datasheet - Page 33

• Manufacturer Part Number: R0K572030S000BE
• Description: KIT DEV FOR SH7203
• Manufacturer: Renesas Electronics America
• Series: Renesas Starter Kits (RSK)r
• Type: MCUr

Specifications of R0K572030S000BE

• Contents: CPU Board, LCD Module, E10A-Lite Emulator, Cable, QuickStart Guide and CD-ROM
• Silicon Manufacturer: Renesas
• Kit Contents: Board
• Silicon Family Name: SH7203
• Silicon Core Number: R5S72030W200FP
• Tool / Board Applications: General Purpose MCU, MPU, DSP, DSC
• Mcu Supported Families: SH7203
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• For Use With/related Products: SH7203
• Lead Free Status / Rohs Status: Compliant

Section 1 Overview
Section 1 Overview
1.1
SH7203 Features
This LSI is a single-chip RISC (reduced instruction set computer) microcontroller that includes a
Renesas Technology-original RISC CPU as its core, and the peripheral functions required to
configure a system.
The CPU in this LSI is the SH-2A CPU that provides upward compatibility for SH-1, SH-2, and
SH-2E CPUs at object code level. It has a RISC-type instruction set and uses a superscalar
architecture and a Harvard architecture, which greatly improves instruction execution speed. In
addition, the 32-bit internal-bus architecture that is independent from the direct memory access
controller (DMAC) enhances data processing power. This CPU brings the user the ability to set up
high-performance systems with strong functionality at less expense than was achievable with
previous microcontrollers, and is even able to handle realtime control applications requiring high-
speed characteristics.
This LSI has a floating-point unit (FPU) and cache. In addition, this LSI includes on-chip
peripheral functions necessary for system configuration, such as 64-Kbyte RAM for high-speed
operation, 16-Kbyte RAM for data retention, a multi-function timer pulse unit 2 (MTU2), a
compare match timer (CMT), a realtime clock (RTC), a serial communication interface with FIFO
2
(SCIF), a synchronous serial communication unit (SSU), an I
C bus interface 3 (IIC3), a serial
sound interface (SSI), a controller area network (RCAN-TL1), an A/D converter, a D/A converter,
an AND/NAND flash memory controller (FLCTL), a USB2.0 host/function module (USB), an
interrupt controller (INTC), and I/O ports.
This LSI also provides an external memory access support function to enable direct connection to
various memory devices or peripheral LSIs. These on-chip functions significantly reduce costs of
designing and manufacturing application systems. Furthermore, I/O pins in this LSI have weak
keeper circuits that prevent the pin voltage from entering an intermediate potential range.
Therefore, no external circuits to fix the input level are required, which reduces the parts number
considerably.
The features of this LSI are listed in table 1.1.
Rev. 3.00 Sep. 28, 2009 Page 1 of 1650
REJ09B0313-0300