R0K572030S000BE Renesas Electronics America, R0K572030S000BE Datasheet - Page 1089

• Manufacturer Part Number: R0K572030S000BE
• Description: KIT DEV FOR SH7203
• Manufacturer: Renesas Electronics America
• Series: Renesas Starter Kits (RSK)r
• Type: MCUr

Specifications of R0K572030S000BE

• Contents: CPU Board, LCD Module, E10A-Lite Emulator, Cable, QuickStart Guide and CD-ROM
• Silicon Manufacturer: Renesas
• Kit Contents: Board
• Silicon Family Name: SH7203
• Silicon Core Number: R5S72030W200FP
• Tool / Board Applications: General Purpose MCU, MPU, DSP, DSC
• Mcu Supported Families: SH7203
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• For Use With/related Products: SH7203
• Lead Free Status / Rohs Status: Compliant

22.2
The pin configuration of the FLCTL is listed in table 22.1.
Table 22.1 Pin Configuration
Note:
Pin
Name
FCE
NAF7 to
NAF0
FCDE
FOE
FSC
FWE
FRB
—*
—*
* Not supported in this LSI.
I/O
Output
I/O
Output
Output
Output
Output
Input
—
—
Input/Output Pins
NAND Type AND Type
CE
I/O7 to I/O0
CLE
ALE
RE
WE
R/B
WP
SE
Corresponding Flash
Memory Pin
CE
I/O7 to I/O0
CDE
OE
SC
WE
R/B
RES
—
Chip Enable
Enables flash memory connected to this LSI.
Data Input/Output
I/O pins for command, address, and data.
Command Latch Enable (CLE)
Asserted when a command is output.
Command Data Enable (CDE)
Asserted when a command is output.
Address Latch Enable (ALE)
Asserted when an address is output and negated when data is
input or output.
Output Enable (OE)
Asserted when data is input or when a status is read.
Read Enable (RE)
Reads data at the falling edge of RE.
Serial Clock (SC)
Inputs or outputs data synchronously with the SC.
Write Enable
Flash memory latches a command, address, and data at the
rising edge of WE.
Ready/Busy
Indicates ready state at high level; indicates busy state at low
level.
Write Protect/Reset
When this pin goes low, erroneous erasure or programming at
power on or off can be prevented.
Spare Area Enable
Used to access spare area. This pin must be fixed at low in
sector access mode.
Function
Section 22 AND/NAND Flash Memory Controller (FLCTL)
Rev. 3.00 Sep. 28, 2009 Page 1057 of 1650
REJ09B0313-0300