R0K572030S000BE Renesas Electronics America, R0K572030S000BE Datasheet - Page 222

KIT DEV FOR SH7203

R0K572030S000BE

Manufacturer Part Number
R0K572030S000BE
Description
KIT DEV FOR SH7203
Manufacturer
Renesas Electronics America
Series
Renesas Starter Kits (RSK)r
Type
MCUr
Datasheets

Specifications of R0K572030S000BE

Contents
CPU Board, LCD Module, E10A-Lite Emulator, Cable, QuickStart Guide and CD-ROM
Silicon Manufacturer
Renesas
Kit Contents
Board
Silicon Family Name
SH7203
Silicon Core Number
R5S72030W200FP
Tool / Board Applications
General Purpose MCU, MPU, DSP, DSC
Mcu Supported Families
SH7203
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
For Use With/related Products
SH7203
Lead Free Status / Rohs Status
Compliant
Section 6 Interrupt Controller (INTC)
Figure 6.12 shows the timing for saving to a register bank. Saving to a register bank takes place
between the start of interrupt exception handling and the start of fetching the first instruction in the
interrupt exception service routine.
(2)
The RESBANK (restore from register bank) instruction is used to restore data saved in a register
bank. After restoring data from the register banks with the RESBANK instruction at the end of the
interrupt exception service routine, execute the RTE instruction to return from interrupt exception
service routine.
Rev. 3.00 Sep. 28, 2009 Page 190 of 1650
REJ09B0313-0300
IRQ
Instruction (instruction replacing
interrupt exception handling)
Overrun fetch
First instruction in interrupt exception
service routine
[Legend]
m1:
m2:
m3:
Restoration from Bank
Vector address read
Saving of SR (stack)
Saving of PC (stack)
2 Icyc + 3 Bcyc + 1 Pcyc
Figure 6.12 Bank Save Timing
F
D
F
3 Icyc
3 Icyc + m1 + m2
E
Saved to bank
E
(1) VTO, PR, GBR, MACL
m1
M
(2) R12, R13, R14, MACH
m2
M
(3) R8, R9, R10, R11
m3
M
F
(4) R4, R5, R6, R7
E
D
(5) R0, R1, R2, R3
E

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