R0K572030S000BE Renesas Electronics America, R0K572030S000BE Datasheet - Page 1146

• Manufacturer Part Number: R0K572030S000BE
• Description: KIT DEV FOR SH7203
• Manufacturer: Renesas Electronics America
• Series: Renesas Starter Kits (RSK)r
• Type: MCUr

Specifications of R0K572030S000BE

• Contents: CPU Board, LCD Module, E10A-Lite Emulator, Cable, QuickStart Guide and CD-ROM
• Silicon Manufacturer: Renesas
• Kit Contents: Board
• Silicon Family Name: SH7203
• Silicon Core Number: R5S72030W200FP
• Tool / Board Applications: General Purpose MCU, MPU, DSP, DSC
• Mcu Supported Families: SH7203
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• For Use With/related Products: SH7203
• Lead Free Status / Rohs Status: Compliant

Section 23 USB 2.0 Host/Function Module (USB)
Note: The TEND bit is available only in D0FBCFG and D1FBCFG.
Rev. 3.00 Sep. 28, 2009 Page 1114 of 1650
REJ09B0313-0300
Bit
8
7 to 4
3 to 0
Bit Name
FEND
⎯
FWAIT[3:0]
Initial
Value
0
All 0
All 1
R/W
R/W
R
R/W
Description
FIFO Port Endian
Specifies the byte endian for use in access to the
FIFO port. Tables 23.5 to 23.7 show endian
operation. This LSI operates in big endian. Set this
bit to transmit or receive data with different endians.
Reserved
These bits are always read as 0. The write value
should always be 0.
FIFO Port Access Wait Specification
These bits specify the number of access waits for the
corresponding FIFO port. The minimum number of
FIFO port access cycles is two.
0000: 0 wait (two access cycles)
0010: 2 waits (four access cycles)
0100: 4 waits (six access cycles)
1111: 15 waits (seventeen access cycles)
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