R0K572030S000BE Renesas Electronics America, R0K572030S000BE Datasheet - Page 466

Manufacturer Part Number

R0K572030S000BE

KIT DEV FOR SH7203

Manufacturer

Renesas Electronics America

Renesas Starter Kits (RSK)r

CPU Board, LCD Module, E10A-Lite Emulator, Cable, QuickStart Guide and CD-ROM

Silicon Manufacturer

Kit Contents

Silicon Family Name

Silicon Core Number

R5S72030W200FP

Tool / Board Applications

General Purpose MCU, MPU, DSP, DSC

Mcu Supported Families

Lead Free Status / RoHS Status

Contains lead / RoHS non-compliant

For Use With/related Products

Lead Free Status / Rohs Status

Section 10 Direct Memory Access Controller (DMAC)

In single address mode, both the transfer source and destination are external devices, either of

them is accessed (selected) by the DACK signal, and the other device is accessed by an address. In

this mode, the DMAC performs one DMA transfer in one bus cycle, accessing one of the external

devices by outputting the DACK transfer request acknowledge signal to it, and at the same time

outputting an address to the other device involved in the transfer. For example, in the case of

transfer between external memory and an external device with DACK shown in figure 10.7, when

the external device outputs data to the data bus, that data is written to the external memory in the

same bus cycle.

Two kinds of transfer are possible in single address mode: (1) transfer between an external device

with DACK and a memory-mapped external device, and (2) transfer between an external device

with DACK and external memory. In both cases, only the external request signal (DREQ) is used

for transfer requests.

Rev. 3.00 Sep. 28, 2009 Page 434 of 1650

REJ09B0313-0300

Single Address Mode

Figure 10.7 Data Flow in Single Address Mode

External address bus

External data bus

Data flow (from memory to device)

Data flow (from device to memory)

External device