R0K572030S000BE Renesas Electronics America, R0K572030S000BE Datasheet - Page 834

• Manufacturer Part Number: R0K572030S000BE
• Description: KIT DEV FOR SH7203
• Manufacturer: Renesas Electronics America
• Series: Renesas Starter Kits (RSK)r
• Type: MCUr

Specifications of R0K572030S000BE

• Contents: CPU Board, LCD Module, E10A-Lite Emulator, Cable, QuickStart Guide and CD-ROM
• Silicon Manufacturer: Renesas
• Kit Contents: Board
• Silicon Family Name: SH7203
• Silicon Core Number: R5S72030W200FP
• Tool / Board Applications: General Purpose MCU, MPU, DSP, DSC
• Mcu Supported Families: SH7203
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• For Use With/related Products: SH7203
• Lead Free Status / Rohs Status: Compliant

Section 16 Synchronous Serial Communication Unit (SSU)
Rev. 3.00 Sep. 28, 2009 Page 802 of 1650
REJ09B0313-0300
Bit
3
2
1
Bit Name
TEND
TDRE
RDRF
Initial
Value
0
1
0
R/W
R/W
R/W
R/W
Description
Transmit End
[Setting conditions]
•
•
[Clearing conditions]
•
•
Transmit Data Empty
Indicates whether or not SSTDR contains transmit data.
[Setting conditions]
•
•
[Clearing conditions]
•
•
•
Receive Data Full
Indicates whether or not SSRDR contains receive data.
[Setting condition]
•
[Clearing conditions]
•
•
•
When the last bit of transmit data is transmitted
while the TENDSTS bit in SSCR2 is cleared to 0
and the TDRE bit is set to 1
After the last bit of transmit data is transmitted while
the TENDSTS bit in SSCR2 is set to 1 and the
TDRE bit is set to 1
When writing 0 after reading TEND = 1
When writing data to SSTDR
When the TE bit in SSER is 0
When data is transferred from SSTDR to SSTRSR
and SSTDR is ready to be written to
When writing 0 after reading TDRE = 1
When writing data to SSTDR with TE = 1
When the DMAC is activated by an SSTXI interrupt
and transmit data is written to SSTDR by the DMAC
transfer
When receive data is transferred from SSTRSR to
SSRDR after successful serial data reception
When writing 0 after reading RDRF = 1
When reading receive data from SSRDR
When the DMAC is activated by an SSRXI interrupt
and receive data is read from SSRDR by the DMAC
transfer