R0K572030S000BE Renesas Electronics America, R0K572030S000BE Datasheet - Page 707

• Manufacturer Part Number: R0K572030S000BE
• Description: KIT DEV FOR SH7203
• Manufacturer: Renesas Electronics America
• Series: Renesas Starter Kits (RSK)r
• Type: MCUr

Specifications of R0K572030S000BE

• Contents: CPU Board, LCD Module, E10A-Lite Emulator, Cable, QuickStart Guide and CD-ROM
• Silicon Manufacturer: Renesas
• Kit Contents: Board
• Silicon Family Name: SH7203
• Silicon Core Number: R5S72030W200FP
• Tool / Board Applications: General Purpose MCU, MPU, DSP, DSC
• Mcu Supported Families: SH7203
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• For Use With/related Products: SH7203
• Lead Free Status / Rohs Status: Compliant

This LSI includes the watchdog timer (WDT), which externally outputs an overflow signal
(WDTOVF) on overflow of the counter when the value of the counter has not been updated
because of a system malfunction. The WDT can simultaneously generate an internal reset signal
for the entire LSI.
The WDT is a single channel timer that counts up the clock oscillation settling period when the
system leaves software standby mode or the temporary standby periods that occur when the clock
frequency is changed. It can also be used as a general watchdog timer or interval timer.
13.1
• Can be used to ensure the clock oscillation settling time
• Can switch between watchdog timer mode and interval timer mode.
• Outputs WDTOVF signal in watchdog timer mode
• Interrupt generation in interval timer mode
• Choice of eight counter input clocks
The WDT is used in leaving software standby mode or the temporary standby periods that
occur when the clock frequency is changed.
When the counter overflows in watchdog timer mode, the WDTOVF signal is output
externally. It is possible to select whether to reset the LSI internally when this happens. Either
the power-on reset or manual reset signal can be selected as the internal reset type.
An interval timer interrupt is generated when the counter overflows.
Eight clocks (Pφ × 1 to Pφ × 1/16384) that are obtained by dividing the peripheral clock can be
selected.
Features
Section 13 Watchdog Timer (WDT)
Rev. 3.00 Sep. 28, 2009 Page 675 of 1650
Section 13 Watchdog Timer (WDT)
REJ09B0313-0300