R0K572030S000BE Renesas Electronics America, R0K572030S000BE Datasheet - Page 1242

• Manufacturer Part Number: R0K572030S000BE
• Description: KIT DEV FOR SH7203
• Manufacturer: Renesas Electronics America
• Series: Renesas Starter Kits (RSK)r
• Type: MCUr

Specifications of R0K572030S000BE

• Contents: CPU Board, LCD Module, E10A-Lite Emulator, Cable, QuickStart Guide and CD-ROM
• Silicon Manufacturer: Renesas
• Kit Contents: Board
• Silicon Family Name: SH7203
• Silicon Core Number: R5S72030W200FP
• Tool / Board Applications: General Purpose MCU, MPU, DSP, DSC
• Mcu Supported Families: SH7203
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• For Use With/related Products: SH7203
• Lead Free Status / Rohs Status: Compliant

Section 23 USB 2.0 Host/Function Module (USB)
Table 23.21 Packet Reception and Buffer Memory Clearing Processing
(e)
By setting the BFRE bit setting in PIPECFG, it is possible to keep the BRDY interrupt from being
generated when a data packet consisting of the maximum packet size is received.
When using DMA transfers, this function can be used to generate an interrupt only when the last
data item has been received. The last data item refers to the reception of a short packet, or the
ending of the transaction counter. When the BFRE bit is set to 1, the BRDY interrupt is generated
after the received data has been read. When the DTLN bit in DnFIFOCTR is read, the length of
the data received in the last data packet to have been received can be confirmed.
Table 23.22 shows the timing at which the BRDY interrupts are generated by this module.
Rev. 3.00 Sep. 28, 2009 Page 1210 of 1650
REJ09B0313-0300
Buffer Status
When Packet is Received
Buffer full
Zero-length packet reception
Normal short packet reception
Transaction count ended
BRDY Interrupt Timing Selection Function
Register Setting
BFRE = 0
to be cleared
Needs to be
cleared
Doesn't need
to be cleared
Doesn't need
to be cleared
Doesn't need
DCLRM = 0
BFRE = 1
Doesn't need
to be cleared
Needs to be
cleared
Needs to be
cleared
Needs to be
cleared
BFRE = 0
Doesn't need
to be cleared
Doesn't need
to be cleared
Doesn't need
to be cleared
Doesn't need
to be cleared
DCLRM = 1
BFRE = 1
Doesn't need
to be cleared
Doesn't need
to be cleared
Doesn't need
to be cleared
Doesn't need
to be cleared