R0K572030S000BE Renesas Electronics America, R0K572030S000BE Datasheet - Page 149

KIT DEV FOR SH7203

R0K572030S000BE

Manufacturer Part Number
R0K572030S000BE
Description
KIT DEV FOR SH7203
Manufacturer
Renesas Electronics America
Series
Renesas Starter Kits (RSK)r
Type
MCUr
Datasheets

Specifications of R0K572030S000BE

Contents
CPU Board, LCD Module, E10A-Lite Emulator, Cable, QuickStart Guide and CD-ROM
Silicon Manufacturer
Renesas
Kit Contents
Board
Silicon Family Name
SH7203
Silicon Core Number
R5S72030W200FP
Tool / Board Applications
General Purpose MCU, MPU, DSP, DSC
Mcu Supported Families
SH7203
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
For Use With/related Products
SH7203
Lead Free Status / Rohs Status
Compliant
4.5.2
Counting by the WDT does not proceed if the frequency divisor is changed but the multiplier is
not.
1. In the initial state, IFC = B'0 and PFC[2:0] = B'011.
2. Set the desired value in the IFC and PFC2 to IFC0 bits. The values that can be set are limited
3. After the register bits (IFC and PFC2 to PFC0) have been set, the clock is supplied of the new
Notes: 1. When executing the SLEEP instruction after the frequency has been changed, be sure
by the clock operating mode and the multiplication rate of PLL circuit. Note that if the wrong
value is set, this LSI will malfunction.
division ratio.
2. When the frequency-multiplier of the PLL circuit is changed and while oscillation is
Changing the Division Ratio
to read the frequency control register (FRQCR) three times before executing the
SLEEP instruction.
settling after exit from software standby mode, an unstable CKIO clock will be output
in clock mode 0, 1, or 3. Control bits 14, 13, and 12 in FRQCR to ensure that this
unstable CKIO clock does not lead to malfunctions.
Rev. 3.00 Sep. 28, 2009 Page 117 of 1650
Section 4 Clock Pulse Generator (CPG)
REJ09B0313-0300

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