R0K572030S000BE Renesas Electronics America, R0K572030S000BE Datasheet - Page 563

KIT DEV FOR SH7203

R0K572030S000BE

Manufacturer Part Number
R0K572030S000BE
Description
KIT DEV FOR SH7203
Manufacturer
Renesas Electronics America
Series
Renesas Starter Kits (RSK)r
Type
MCUr
Datasheets

Specifications of R0K572030S000BE

Contents
CPU Board, LCD Module, E10A-Lite Emulator, Cable, QuickStart Guide and CD-ROM
Silicon Manufacturer
Renesas
Kit Contents
Board
Silicon Family Name
SH7203
Silicon Core Number
R5S72030W200FP
Tool / Board Applications
General Purpose MCU, MPU, DSP, DSC
Mcu Supported Families
SH7203
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
For Use With/related Products
SH7203
Lead Free Status / Rohs Status
Compliant
11.4.3
Buffer operation, provided for channels 0, 3, and 4, enables TGRC and TGRD to be used as buffer
registers. In channel 0, TGRF can also be used as a buffer register.
Buffer operation differs depending on whether TGR has been designated as an input capture
register or as a compare match register.
Note: TGRE_0 cannot be designated as an input capture register and can only operate as a
Table 11.41 shows the register combinations used in buffer operation.
Table 11.41 Register Combinations in Buffer Operation
• When TGR is an output compare register
Channel
0
3
4
When a compare match occurs, the value in the buffer register for the corresponding channel is
transferred to the timer general register.
This operation is illustrated in figure 11.14.
compare match register.
Buffer Operation
register
Buffer
Figure 11.14 Compare Match Buffer Operation
Timer General Register
TGRA_0
TGRB_0
TGRE_0
TGRA_3
TGRB_3
TGRA_4
TGRB_4
Compare match signal
Timer general
register
Section 11 Multi-Function Timer Pulse Unit 2 (MTU2)
Comparator
Rev. 3.00 Sep. 28, 2009 Page 531 of 1650
Buffer Register
TGRC_0
TGRD_0
TGRF_0
TGRC_3
TGRD_3
TGRC_4
TGRD_4
TCNT
REJ09B0313-0300

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