R0K572030S000BE Renesas Electronics America, R0K572030S000BE Datasheet - Page 227
R0K572030S000BE
Manufacturer Part Number
R0K572030S000BE
Description
KIT DEV FOR SH7203
Manufacturer
Renesas Electronics America
Series
Renesas Starter Kits (RSK)r
Type
MCUr
Specifications of R0K572030S000BE
Contents
CPU Board, LCD Module, E10A-Lite Emulator, Cable, QuickStart Guide and CD-ROM
Silicon Manufacturer
Renesas
Kit Contents
Board
Silicon Family Name
SH7203
Silicon Core Number
R5S72030W200FP
Tool / Board Applications
General Purpose MCU, MPU, DSP, DSC
Mcu Supported Families
SH7203
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
For Use With/related Products
SH7203
Lead Free Status / Rohs Status
Compliant
- Current page: 227 of 1686
- Download datasheet (10Mb)
6.10
6.10.1
The interrupt source flags should be cleared in the interrupt exception service routine. After
clearing the interrupt source flag, "time from occurrence of interrupt request until interrupt
controller identifies priority, compares it with mask bits in SR, and sends interrupt request signal
to CPU" shown in table 6.5 is required before the interrupt source sent to the CPU is actually
cancelled. To ensure that an interrupt request that should have been cleared is not inadvertently
accepted again, read* the interrupt source flag after it has been cleared, and then execute an RTE
instruction.
Note: * When clearing the USB interrupt source flag, read the flag three times after clearing it.
6.10.2
Once the interrupt controller has accepted an interrupt request, the low level is output from the
IRQOUT pin until the CPU jumps to the first address of the interrupt exception service routine,
after which the high level is output from the IRQOUT pin.
If, however, the interrupt controller has accepted an interrupt request and the low level is being
output from the IRQOUT pin, but the interrupt request is canceled before the CPU has jumped to
the first address of the interrupt exception service routine, the low level continues to be output
from the IRQOUT pin until the CPU has jumped to the first address of the interrupt exception
service routine for the next interrupt request.
Usage Note
Timing to Clear an Interrupt Source
Timing of IRQOUT Negation
Rev. 3.00 Sep. 28, 2009 Page 195 of 1650
Section 6 Interrupt Controller (INTC)
REJ09B0313-0300
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