R0K572030S000BE Renesas Electronics America, R0K572030S000BE Datasheet - Page 1274

• Manufacturer Part Number: R0K572030S000BE
• Description: KIT DEV FOR SH7203
• Manufacturer: Renesas Electronics America
• Series: Renesas Starter Kits (RSK)r
• Type: MCUr

Specifications of R0K572030S000BE

• Contents: CPU Board, LCD Module, E10A-Lite Emulator, Cable, QuickStart Guide and CD-ROM
• Silicon Manufacturer: Renesas
• Kit Contents: Board
• Silicon Family Name: SH7203
• Silicon Core Number: R5S72030W200FP
• Tool / Board Applications: General Purpose MCU, MPU, DSP, DSC
• Mcu Supported Families: SH7203
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• For Use With/related Products: SH7203
• Lead Free Status / Rohs Status: Compliant

Section 24 LCD Controller (LCDC)
24.3.3
LDDFR sets the bit alignment for pixel data in one byte and selects the data type and number of
colors used for display so as to match the display driver software specifications.
Initial value:
Rev. 3.00 Sep. 28, 2009 Page 1242 of 1650
REJ09B0313-0300
Bit
15 to 9
8
7
R/W:
Bit:
LCDC Data Format Register (LDDFR)
15
R
0
-
Bit Name
⎯
PABD
⎯
14
R
0
-
13
R
0
-
Initial
Value
All 0
0
0
12
R
0
-
11
R
0
-
R/W
R
R/W
R
10
R
0
-
Description
Reserved
These bits are always read as 0. The write value should
always be 0.
Byte Data Pixel Alignment
Sets the pixel data alignment type in one byte of data.
The contents of aligned data per pixel are the same
regardless of this bit's setting. For example, data H'05
should be expressed as B'0101 which is the normal
style handled by a MOV instruction of the this CPU, and
should not be selected between B'0101 and B'1010.
0: Big endian for byte data
1: Little endian for byte data
Reserved
This bit is always read as 0. The write value should
always be 0.
R
9
0
-
PABD
R/W
8
0
R
7
0
-
R/W
6
0
R/W
5
0
R/W
4
0
DSPCOLOR[6:0]
R/W
3
1
R/W
2
1
R/W
1
0
R/W
0
0