R0K572030S000BE Renesas Electronics America, R0K572030S000BE Datasheet - Page 698

KIT DEV FOR SH7203

R0K572030S000BE

Manufacturer Part Number
R0K572030S000BE
Description
KIT DEV FOR SH7203
Manufacturer
Renesas Electronics America
Series
Renesas Starter Kits (RSK)r
Type
MCUr
Datasheets

Specifications of R0K572030S000BE

Contents
CPU Board, LCD Module, E10A-Lite Emulator, Cable, QuickStart Guide and CD-ROM
Silicon Manufacturer
Renesas
Kit Contents
Board
Silicon Family Name
SH7203
Silicon Core Number
R5S72030W200FP
Tool / Board Applications
General Purpose MCU, MPU, DSP, DSC
Mcu Supported Families
SH7203
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
For Use With/related Products
SH7203
Lead Free Status / Rohs Status
Compliant
Section 12 Compare Match Timer (CMT)
12.2.2
CMCSR is a 16-bit register that indicates compare match generation, enables or disables
interrupts, and selects the counter input clock.
Initial value:
Rev. 3.00 Sep. 28, 2009 Page 666 of 1650
REJ09B0313-0300
Bit
15 to 8
7
6
5 to 2
Note:
R/W:
Bit:
*
Compare Match Timer Control/Status Register (CMCSR)
Only 0 can be written to clear the flag after 1 is read.
Bit Name
CMF
CMIE
15
R
0
-
14
R
0
-
13
R
0
-
Initial
Value
All 0
0
0
All 0
12
R
0
-
11
R
0
-
R/W
R
R/(W)* Compare Match Flag
R/W
R
10
R
0
-
Description
Reserved
These bits are always read as 0. The write value should
always be 0.
Indicates whether or not the values of CMCNT and
CMCOR match.
0: CMCNT and CMCOR values do not match
[Clearing condition]
1: CMCNT and CMCOR values match
Enables or disables compare match interrupt (CMI)
generation when CMCNT and CMCOR values match
(CMF = 1).
0: Compare match interrupt (CMI) disabled
1: Compare match interrupt (CMI) enabled
Reserved
These bits are always read as 0. The write value should
always be 0.
Compare Match Interrupt Enable
R
9
0
-
When 0 is written to CMF after reading CMF = 1
R
8
0
-
R/(W)* R/W
CMF
7
0
CMIE
6
0
R
5
0
-
R
4
0
-
R
3
0
-
R
2
0
-
R/W
1
0
CKS[1:0]
R/W
0
0

Related parts for R0K572030S000BE