R0K572030S000BE Renesas Electronics America, R0K572030S000BE Datasheet - Page 787

• Manufacturer Part Number: R0K572030S000BE
• Description: KIT DEV FOR SH7203
• Manufacturer: Renesas Electronics America
• Series: Renesas Starter Kits (RSK)r
• Type: MCUr

Specifications of R0K572030S000BE

• Contents: CPU Board, LCD Module, E10A-Lite Emulator, Cable, QuickStart Guide and CD-ROM
• Silicon Manufacturer: Renesas
• Kit Contents: Board
• Silicon Family Name: SH7203
• Silicon Core Number: R5S72030W200FP
• Tool / Board Applications: General Purpose MCU, MPU, DSP, DSC
• Mcu Supported Families: SH7203
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• For Use With/related Products: SH7203
• Lead Free Status / Rohs Status: Compliant

Bit
10 to 8
7, 6
Bit Name
RSTRG[2:0] 000
RTRG[1:0]
Initial
Value R/W
00
R/W
R/W
Description
RTS Output Active Trigger
When the quantity of receive data in receive FIFO data
register (SCFRDR) becomes more than the number
shown below, RTS signal is set to high.
000: 15
001: 1
010: 4
011: 6
100: 8
101: 10
110: 12
111: 14
Receive FIFO Data Trigger
•
•
Note: In clock synchronous mode, to transfer the
Section 15 Serial Communication Interface with FIFO (SCIF)
Set the quantity of receive data which sets the receive
data full (RDF) flag in the serial status register
(SCFSR). The RDF flag is set to 1 when the quantity
of receive data stored in the receive FIFO register
(SCFRDR) is increased more than the set trigger
number shown below.
Asynchronous mode •
00: 1
01: 4
10: 8
11: 14
receive data using DMAC, set the receive trigger
number to 1. If set to other than 1, CPU must
read the receive data left in SCFRDR.
Rev. 3.00 Sep. 28, 2009 Page 755 of 1650
Clock synchronous mode
00: 1
01: 2
10: 8
11: 14
REJ09B0313-0300