R0K572030S000BE Renesas Electronics America, R0K572030S000BE Datasheet - Page 1106

• Manufacturer Part Number: R0K572030S000BE
• Description: KIT DEV FOR SH7203
• Manufacturer: Renesas Electronics America
• Series: Renesas Starter Kits (RSK)r
• Type: MCUr

Specifications of R0K572030S000BE

• Contents: CPU Board, LCD Module, E10A-Lite Emulator, Cable, QuickStart Guide and CD-ROM
• Silicon Manufacturer: Renesas
• Kit Contents: Board
• Silicon Family Name: SH7203
• Silicon Core Number: R5S72030W200FP
• Tool / Board Applications: General Purpose MCU, MPU, DSP, DSC
• Mcu Supported Families: SH7203
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• For Use With/related Products: SH7203
• Lead Free Status / Rohs Status: Compliant

Section 22 AND/NAND Flash Memory Controller (FLCTL)
Rev. 3.00 Sep. 28, 2009 Page 1074 of 1650
REJ09B0313-0300
Bit
9
8
7
Bit Name
ECERB
STERB
BTOERB
Initial
Value
0
0
0
R/W
R/(W)* ECC Error
R/(W)* Status Error
R/(W)* R/B Timeout Error
Description
Indicates the result of ECC error detection. This bit is
set to 1 if an ECC error occurs while flash memory is
read in sector access mode.
This bit is a flag. 1 cannot be written to this bit. Only 0
can be written to clear the flag.
0: Indicates that no ECC error occurs (Latched ECC is
1: Indicates that an ECC error occurs
Indicates the result of status read. This bit is set to 1 if
the specific bit in the bits STAT[7:0] in FLBSYCNT is
set to 1 in status read.
This bit is a flag. 1 cannot be written to this bit. Only 0
can be written to clear the flag.
0: Indicates that no status error occurs (the specific bit
1: Indicates that a status error occurs
For details on the specific bit in STAT7 to STAT0 bits,
see section 22.4.7, Status Read.
This bit is set to 1 if an R/B timeout error occurs (the
bits RBTIMCNT[19:0] in FLBSYCNT are decremented
to 0).
This bit is a flag. 1 cannot be written to this bit. Only 0
can be written to clear the flag.
0: Indicates that no R/B timeout error occurs
1: Indicates that an R/B timeout error occurs
all 0.)
in the bits STAT[7:0] in FLBSYCNT is 0.)