MPC8536E-ANDROID Freescale Semiconductor, MPC8536E-ANDROID Datasheet - Page 98

• Manufacturer Part Number: MPC8536E-ANDROID
• Description: HARDWARE/SOFTWARE ANDROID OS
• Manufacturer: Freescale Semiconductor
• Series: PowerQUICC ™r
• Type: MPUr

Specifications of MPC8536E-ANDROID

• Contents: Board
• For Use With/related Products: MPC8536
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Table
Number
17-36
17-37
17-38
17-39
17-40
17-41
17-42
17-43
17-44
17-45
17-46
17-47
17-48
17-49
17-50
17-51
17-52
17-53
17-54
17-55
17-56
17-57
17-58
17-59
17-60
17-61
17-62
17-63
17-64
17-65
17-66
17-67
17-68
17-69
17-70
17-71
17-72
17-73
17-74
17-75
xcviii
PEX Error Capture Register 3 Field Descriptions
PCI Express Vendor ID Register Field Description............................................................ 17-45
PCI Express Device ID Register Field Description ............................................................ 17-46
PCI Express Command Register Field Descriptions .......................................................... 17-46
PCI Express Status Register Field Descriptions ................................................................. 17-48
PCI Express Revision ID Register Field Descriptions........................................................ 17-48
PCI Express Class Code Register Field Descriptions ......................................................... 17-49
PCI Express Bus Cache Line Size Register Field Descriptions.......................................... 17-49
PCI Express Bus Latency Timer Register Field Descriptions ............................................ 17-50
PCI Express Bus Latency Timer Register Field Descriptions ............................................ 17-50
PEXCSRBAR Field Descriptions ....................................................................................... 17-52
32-Bit Memory Base Address Register (BAR1) Field Descriptions .................................. 17-52
64-Bit Low Memory Base Address Register Field Descriptions........................................ 17-53
Bit Setting for 64-Bit High Memory Base Address Register.............................................. 17-53
PCI Express Subsystem Vendor ID Register Field Description ......................................... 17-54
PCI Express Subsystem ID Register Field Description ...................................................... 17-54
Capabilities Pointer Register Field Description.................................................................. 17-55
PCI Express Interrupt Line Register Field Description ...................................................... 17-55
PCI Express Interrupt Pin Register Field Description ........................................................ 17-56
PCI Express Maximum Grant Register Field Description.................................................. 17-56
PCI Express Maximum Latency Register Field Description .............................................. 17-57
PEXCSRBAR Field Descriptions ....................................................................................... 17-58
PCI Express Primary Bus Number Register Field Description .......................................... 17-58
PCI Express Secondary Bus Number Register Field Description ...................................... 17-59
PCI Express Subordinate Bus Number Register Field Description .................................... 17-59
PCI Express I/O Base Register Field Description .............................................................. 17-60
PCI Express I/O Limit Register Field Description ............................................................. 17-61
PCI Express Secondary Status Register Field Description ................................................. 17-61
PCI Express Memory Base Register Field Description ...................................................... 17-62
PCI Express Memory Limit Register Field Description ..................................................... 17-62
PCI Express Prefetchable Memory Base Register Field Description ................................. 17-63
PCI Express Prefetchable Memory Limit Register Field Description................................ 17-63
PCI Express Prefetchable Base Upper 32 Bits Register ..................................................... 17-64
PCI Express Prefetchable Limit Upper 32 Bits Register .................................................... 17-64
PCI Express I/O Base Upper 16 Bits Register Field Description ....................................... 17-65
PCI Express I/O Limit Upper 16 Bits Register Field Description ...................................... 17-65
Capabilities Pointer Register Field Description.................................................................. 17-65
PCI Express Interrupt Line Register Field Description ...................................................... 17-66
PCI Express Interrupt Pin Register Field Description ........................................................ 17-66
PCI Express Bridge Control Register Field Description .................................................... 17-67
External Source, Inbound Memory Request Transaction .............................................. 17-43
MPC8536E PowerQUICC III Integrated Processor Reference Manual, Rev. 1
Tables
Title
Freescale Semiconductor
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