MPC8536E-ANDROID Freescale Semiconductor, MPC8536E-ANDROID Datasheet - Page 1098
MPC8536E-ANDROID
Manufacturer Part Number
MPC8536E-ANDROID
Description
HARDWARE/SOFTWARE ANDROID OS
Manufacturer
Freescale Semiconductor
Series
PowerQUICC ™r
Type
MPUr
Datasheets
1.MPC8536EBVTAVLA.pdf
(127 pages)
2.MPC8536EBVTAVLA.pdf
(2 pages)
3.MPC8536EBVTAVLA.pdf
(1706 pages)
Specifications of MPC8536E-ANDROID
Contents
Board
For Use With/related Products
MPC8536
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
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PCI Express Interface Controller
As an initiator, the PCI Express controller supports memory read and write operations with a maximum
transaction size of 256 bytes. In addition, configuration and I/O transactions are supported if the PCI
Express controller is in RC mode. As a target interface, the PCI Express controller accepts read and write
operations to local memory space. When configured as an EP device, the PCI Express controller accepts
configuration transactions to the internal PCI Express configuration registers. Message generation and
acceptance are supported in both RC and EP modes. Locked transactions and inbound I/O transactions are
not supported.
17.1.1.1
Outbound internal platform transactions to PCI Express are first mapped to a translation window to
determine what PCI Express transactions are to be issued. A transaction from the internal platform can
become a PCI Express Memory, I/O, Message, or Configuration transaction depending on the window
attributes.
A transaction may be broken up into smaller sized transactions depending on the original request size,
transaction type, and either the PCI Express device control register [MAX_PAYLOAD_SIZE] field for
write requests or the PCI Express device control register [MAX_READ_SIZE] field for read requests. The
17-2
Outbound Transactions
MPC8536E PowerQUICC III Integrated Processor Reference Manual, Rev. 1
Internal Platform (OCeaN) Interface
RX
RX
RX
Figure 17-1. PCI Express Controller Block Diagram
PCI Express Link
SerDes Interface
TX
TX
TX
Transaction Layer
Data Link Layer
MAC Layer
Message Manager
Freescale Semiconductor
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