MPC8536E-ANDROID Freescale Semiconductor, MPC8536E-ANDROID Datasheet - Page 1287

• Manufacturer Part Number: MPC8536E-ANDROID
• Description: HARDWARE/SOFTWARE ANDROID OS
• Manufacturer: Freescale Semiconductor
• Series: PowerQUICC ™r
• Type: MPUr

Specifications of MPC8536E-ANDROID

• Contents: Board
• For Use With/related Products: MPC8536
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Offset: 0x024 (PRSSTAT)
20.4.7
PRSSTAT indicates the status of the eSDHC to the host driver.
Freescale Semiconductor
Reset
Reset
DLSL
CLSL
Field
9–11
0–7
W
W
R
R
8
16
0
n
0
SDHC_DAT[7:0] line signal level. These bits are used to check the SDHC_DAT line level to recover from errors, and
for debugging.This is especially useful in detecting the busy signal level from SDHC_DAT[0]. The reset value is
affected by the external pull resistors. By default, read value of this bit field after reset is 11110111, when
SDHC_DAT[3] is pull-down and other lines are pull-up.
SDHC_CMD line signal level. This status is used to check the SDHC_CMD line level to recover from errors, and for
debugging. The reset value is affected by the external pull resistor, by default, read value of this bit after reset is 1,
when the command line is pull-up.
Reserved
Present State Register (PRSSTAT)
n
0
—
n
0
MPC8536E PowerQUICC III Integrated Processor Reference Manual, Rev. 1
19
n
0
DLSL
BREN BWEN RTA WTA
20
n
0
Figure 20-9. Present State Register (PRSSTAT)
Table 20-11. PRSSTAT Field Descriptions
21
n
0
22
n
0
PRSSTAT Bit
23
n
0
7
0
1
2
3
4
5
6
7
CLSL
OFF
SD
24
1
n
8
Description
PER
OFF
25
9
0
n
SDHC_DAT n
HCK
OFF
7
6
5
4
3
2
1
0
—
26
0
n
OFF
IPG
11
27
0
n
Enhanced Secure Digital Host Controller
WPSPL SDHC_CD
—
12
28
n
0
DLA
13
29
n
0
Access: Read
CDIHB CIHB
14
—
30
0
0
20-13
CINS
15
31
n
0