MPC8536E-ANDROID Freescale Semiconductor, MPC8536E-ANDROID Datasheet - Page 200

• Manufacturer Part Number: MPC8536E-ANDROID
• Description: HARDWARE/SOFTWARE ANDROID OS
• Manufacturer: Freescale Semiconductor
• Series: PowerQUICC ™r
• Type: MPUr

Specifications of MPC8536E-ANDROID

• Contents: Board
• For Use With/related Products: MPC8536
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Reset, Clocking, and Initialization
4-30
1
0x80 + 8*(N–1)
N <=40 if compatibility with FAT12/FAT16/FAT32 filesystems is required. Refer to
FAT12/FAT16/FAT32
0x4C–0x4F
0x5C–0x5F
0x6C–0x7F
0x8C–0x8F
0x48–0x4B
0x58–0x5B
0x68–0x6B
0x88–0x8B
0x50–0x53
0x54–0x57
0x60–0x63
0x64–0x67
0x80–0x83
0x84–0x87
8*(N–1)+4
Address
0x80 +
User’s code length. Number of bytes in the user’s code to be copied. This must be a multiple of the
SD/MMC card’s block size (and the user’s code zero-padded if necessary to achieve that length).
User’s code length <= 2GBytes.
Reserved
Source Address. Contains the starting address of the user’s code as an offset from the SD/MMC card
starting address.
In Standard Capacity SD/MMC Cards, the 32-bit Source Address specifies the memory address in
byte address format. This must be a multiple of the SD/MMC card’s block size.
In High Capacity SD Cards (>2GByte), the 32-bit Source Address specifies the memory address in
block address format. Block length is fixed to 512 bytes as per the SD High Capacity specification.
Reserved
Target Address. Contains the target address in the system’s local memory address space in which the
user’s code will be copied to. This is a 32-bit effective address. The core is configured in such a way
that the 36-bit real address is equal to this (with 4 most significant bits zero).
Reserved
Execution Starting Address. Contains the jump address in the system’s local memory address space
into the user’s code first instruction to be executed. This is a 32-bit effective address. The core is
configured in such a way that the 36-bit real address is equal to this (with 4 most significant bits zero).
Reserved
N. Number of Config Address/Data pairs.
Must be 1<=N<=1024 (but is recommended to be as small as possible).
Reserved.
Config Address 1
Config Data 1
Config Address 2
Config Data 2
Config Address N
Config Data N (final Config Data N optional)
User’s code. Note that user's code must start on a 512-byte boundary.
MPC8536E PowerQUICC III Integrated Processor Reference Manual, Rev. 1
Filesystems” for details.
Table 4-35. SD/MMC Card Data Structure (continued)
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Section , “Notes on compatibility with
Freescale Semiconductor