MPC8536E-ANDROID Freescale Semiconductor, MPC8536E-ANDROID Datasheet - Page 31

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MPC8536E-ANDROID

Manufacturer Part Number
MPC8536E-ANDROID
Description
HARDWARE/SOFTWARE ANDROID OS
Manufacturer
Freescale Semiconductor
Series
PowerQUICC ™r
Type
MPUr

Specifications of MPC8536E-ANDROID

Contents
Board
For Use With/related Products
MPC8536
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Paragraph
Number
15.4.4
15.4.5
15.5
15.5.1
15.5.1.1
15.5.1.2
15.5.1.3
15.5.1.4
16.1
16.1.1
16.1.1.1
16.1.1.2
16.1.2
16.1.3
16.1.3.1
16.1.3.1.1
16.1.3.1.2
16.1.3.1.3
16.1.3.2
16.1.3.3
16.1.3.4
16.2
16.3
16.3.1
16.3.1.1
16.3.1.1.1
16.3.1.1.2
16.3.1.1.3
16.3.1.2
16.3.1.2.1
16.3.1.2.2
16.3.1.2.3
16.3.1.2.4
16.3.1.3
16.3.1.3.1
16.3.1.3.2
Freescale Semiconductor
DMA System Considerations ...................................................................................... 15-38
Introduction.................................................................................................................... 16-1
External Signal Descriptions ......................................................................................... 16-6
Memory Map/Register Definitions .............................................................................. 16-11
DMA Descriptors..................................................................................................... 15-33
Limitations and Restrictions .................................................................................... 15-36
Unusual DMA Scenarios ......................................................................................... 15-39
Overview.................................................................................................................... 16-2
Features...................................................................................................................... 16-4
Modes of Operation ................................................................................................... 16-4
PCI Memory-Mapped Registers .............................................................................. 16-11
MPC8536E PowerQUICC III Integrated Processor Reference Manual, Rev. 1
DMA to Core ...................................................................................................... 15-39
DMA to Configuration, Control, and Status Registers........................................ 15-39
DMA to I
DMA to DUART ................................................................................................. 15-39
Outbound Transactions .......................................................................................... 16-3
Inbound Transactions............................................................................................. 16-4
Host/Agent Mode Configuration ........................................................................... 16-5
PCI Clocking Configuration .................................................................................. 16-5
PCI Arbiter (Internal/External Arbiter) Configuration.......................................... 16-5
PCI Impedance Configuration ............................................................................... 16-5
PCI Configuration Access Registers ................................................................... 16-14
PCI ATMU Outbound Registers.......................................................................... 16-15
PCI ATMU Inbound Registers............................................................................. 16-19
Host Mode ......................................................................................................... 16-5
Agent Mode ....................................................................................................... 16-5
Agent Configuration Lock Mode ...................................................................... 16-5
PCI Configuration Address Register (CFG_ADDR) ...................................... 16-14
PCI Configuration Data Register (CFG_DATA) ............................................. 16-15
PCI Interrupt Acknowledge Register (INT_ACK).......................................... 16-15
PCI Outbound Translation Address Registers (POTARn) .............................. 16-16
PCI Outbound Translation Extended Address Registers (POTEARn)............ 16-16
PCI Outbound Window Base Address Registers (POWBARn)...................... 16-17
PCI Outbound Window Attributes Registers (POWARn)............................... 16-17
PCI Inbound Translation Address Registers (PITARn)................................... 16-20
PCI Inbound Window Base Address Registers (PIWBARn) .......................... 16-20
2
C ......................................................................................................... 15-39
PCI Bus Interface
Contents
Chapter 16
Title
Number
Page
xxxi

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