MPC8536E-ANDROID Freescale Semiconductor, MPC8536E-ANDROID Datasheet - Page 224

• Manufacturer Part Number: MPC8536E-ANDROID
• Description: HARDWARE/SOFTWARE ANDROID OS
• Manufacturer: Freescale Semiconductor
• Series: PowerQUICC ™r
• Type: MPUr

Specifications of MPC8536E-ANDROID

• Contents: Board
• For Use With/related Products: MPC8536
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

L2 Look-Aside Cache/SRAM
6.2
The on-chip memory array has eight banks, each containing 256 sets of eight cache blocks (or ‘ways’), as
shown in
6-4
Bank 0
Figure
L2 Cache and SRAM Organization
Way 0
Way 1
Way 2
Way 3
Way 4
Way 5
Way 6
Way 7
6-2. Each block consists of 32 bytes of data and a tag.
256 Sets
Address Tag 0
Address Tag 1
Address Tag 2
Address Tag 3
Address Tag 4
Address Tag 5
Address Tag 6
Address Tag 7
MPC8536E PowerQUICC III Integrated Processor Reference Manual, Rev. 1
Bank 7
Way 0
Way 1
Way 2
Way 3
Way 4
Block 5
Block 6
Block 7
256 Sets
Address Tag 0
Address Tag 1
Address Tag 2
Address Tag 3
Address Tag 4
Address Tag 5
Address Tag 6
Address Tag 7
Figure 6-2. Cache Organization
8 Words/Block
Words [0–7]
Words [0–7]
Words [0–7]
Words [0–7]
Words [0–7]
Words [0–7]
Words [0–7]
Words [0–7]
8 Words/Block
Words [0–7]
Words [0–7]
Words [0–7]
Words [0–7]
Words [0–7]
Words [0–7]
Words [0–7]
Words [0–7]
Freescale Semiconductor