MPC8536E-ANDROID Freescale Semiconductor, MPC8536E-ANDROID Datasheet - Page 1006

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MPC8536E-ANDROID

Manufacturer Part Number
MPC8536E-ANDROID
Description
HARDWARE/SOFTWARE ANDROID OS
Manufacturer
Freescale Semiconductor
Series
PowerQUICC ™r
Type
MPUr

Specifications of MPC8536E-ANDROID

Contents
Board
For Use With/related Products
MPC8536
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
DMA Controller
Table 15-16
Figure 15-17
Table 15-17
15-20
Offset 0x134
Reset
Offset 0x130
Reset
W
27–31
R
0–26
W
Bits
28–31
R
0–27
Bits
0x1B4
0x234
0x2B4
0
0x1B0
0x230
0x2B0
0
describes the fields of the ECLSDARn registers.
describes the fields of the CLSDARn.
CLSDA
Name
Figure 15-16. Extended Current List Descriptor Address Registers (ECLSDAR n )
describes the definition for the CLSDARn registers.
ECLSDA
Name
Figure 15-17. Current List Descriptor Address Registers (CLSDAR n )
MPC8536E PowerQUICC III Integrated Processor Reference Manual, Rev. 1
Current list descriptor address. Contains the low-order bits of the 36-bit current list descriptor
address of the buffer descriptor in memory in extended chaining mode. The descriptor must be
aligned to a 32-byte boundary.
Reserved
Reserved
Current list descriptor extended address bits (upper 4 bits of 36-bit address)
Table 15-16. ECLSDAR n Field Descriptions
Table 15-17. CLSDAR n Field Descriptions
CLSDA
All zeros
All zeros
Description
Description
Freescale Semiconductor
26
Access: Read/Write
Access: Read/Write
27
27 28
ECLSDA
31
31

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