MPC8536E-ANDROID Freescale Semiconductor, MPC8536E-ANDROID Datasheet - Page 839

• Manufacturer Part Number: MPC8536E-ANDROID
• Description: HARDWARE/SOFTWARE ANDROID OS
• Manufacturer: Freescale Semiconductor
• Series: PowerQUICC ™r
• Type: MPUr

Specifications of MPC8536E-ANDROID

• Contents: Board
• For Use With/related Products: MPC8536
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

14.5.3.6.7
Figure 14-61
Table 14-65
14.5.3.6.8
Figure 14-62
Table 14-66
Freescale Semiconductor
10–31
Offset eTSEC1:0x2_4698;
Reset
0–31
Bits
Bits
0–9
Offset eTSEC1:0x2_469C;
Reset
W
R
W
eTSEC3:0x2_6698
R
0
TRMGV Increments for each good or bad frame transmitted and received which is 1519–1522 bytes in length,
Name
RBYT
Name
Figure 14-61. Transmit and Received 1519- to 1522-Byte VLAN Frame Register Definition
eTSEC3:0x2_669C
0
—
describes the fields of the TRMGV register.
describes the fields of the RBYT register.
describes the definition for the TRMGV register.
shows the RBYT register.
Transmit and Receive 1519- to 1522-Byte VLAN Frame Counter (TRMGV)
Receive Byte Counter (RBYT)
Receive byte counter. The statistic counter register increments by the byte count of frames received, including
those in bad packets, excluding preamble and SFD but including FCS bytes. In FIFO mode, all bytes (including
FCS bytes) are counted.
Reserved
inclusive (excluding preamble and SFD but including FCS bytes).
MPC8536E PowerQUICC III Integrated Processor Reference Manual, Rev. 1
—
Figure 14-62. Receive Byte Counter Register Definition
Table 14-65. TRMGV Field Descriptions
Table 14-66. RBYT Field Descriptions
9
10
All zeros
All zeros
RBYT
Description
Description
TRMGV
Enhanced Three-Speed Ethernet Controllers
Access: Read/Write
Access: Read/Write
14-91
31
31