MPC8536E-ANDROID Freescale Semiconductor, MPC8536E-ANDROID Datasheet - Page 1167

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MPC8536E-ANDROID

Manufacturer Part Number
MPC8536E-ANDROID
Description
HARDWARE/SOFTWARE ANDROID OS
Manufacturer
Freescale Semiconductor
Series
PowerQUICC ™r
Type
MPUr

Specifications of MPC8536E-ANDROID

Contents
Board
For Use With/related Products
MPC8536
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
17.3.9.5
The PCI Express capability ID register is shown in
17.3.9.6
The PCI Express capabilities register is shown in
Freescale Semiconductor
Offset 0x4C
Reset
Offset 0x4E
Reset
15–14
13–9
Bits
7–4
3–0
W
8
R
W
R
Interrupt Message Number If this function is allocated more than one MSI interrupt number, then this register is
15
0
0
7
Capability Version
Device/Port Type
PCI Express Capability ID Register—0x4C
PCI Express Capabilities Register—0x4E
Bits
7–0
14
0
Name
Slot
MPC8536E PowerQUICC III Integrated Processor Reference Manual, Rev. 1
PCI Express Capability ID PCI Express = 0x10
Table 17-80. PCI Express Capability ID Register Field Description
Table 17-81. PCI Express Capabilities Register Field Description
13
0
Interrupt Message Number
0
0
Name
Figure 17-83. PCI Express Capability ID Register
Figure 17-84. PCI Express Capabilities Register
Reserved
required to contain the offset between the base Message Data and the MSI Message that
is generated when any of the status bits in either the Slot Status register or the Root Port
Status register, of this capability structure, are set.
Slot Implemented (RC mode only)
0100 (RC mode)
0000 (EP mode)
Indicates the defined PCI Express capability structure version number. Must be 1h for 1.0,
1.0a, and 1.1 specification.
0
0
0
PCI Express Capability ID
0
1
Figure
Slot
Figure
0
8
17-84.
7
0
17-83.
Device/Port Type
0
Description
Description
n
0
0
0
4
PCI Express Interface Controller
0
3
0
Access: Read only
0
Access: Read only
Version
0
0
0
17-71
1
0

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