MPC8536E-ANDROID Freescale Semiconductor, MPC8536E-ANDROID Datasheet - Page 119

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MPC8536E-ANDROID

Manufacturer Part Number
MPC8536E-ANDROID
Description
HARDWARE/SOFTWARE ANDROID OS
Manufacturer
Freescale Semiconductor
Series
PowerQUICC ™r
Type
MPUr

Specifications of MPC8536E-ANDROID

Contents
Board
For Use With/related Products
MPC8536
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Part I
Overview
Part I describes the many features of the MPC8536E integrated host processor at an overview level. The
following chapters are included:
Freescale Semiconductor
Chapter 1, “Overview,”
MPC8536E integrated host processor. It describes the MPC8536E, its interfaces, and its
programming model. The functional operation of the MPC8536E with emphasis on peripheral
functions is also described.
Chapter 2, “Memory Map,”
local address map is followed by a description of how local access windows are used to define the
local address map. The inbound and outbound address translation mechanisms used to map to and
from external memory spaces are described next. Finally, the configuration, control, and status
registers are described, including a complete listing of all memory-mapped registers with cross
references to the sections detailing descriptions of each.
Chapter 3, “Signal Descriptions,”
signals that serve multiple functions, output signal states at reset, and reset configuration signals
(and the modes they define).
Chapter 4, “Reset, Clocking, and Initialization,”
reset (POR) sequence, power-on reset configuration, clocking, and initialization of the
MPC8536E.
MPC8536E PowerQUICC III Integrated Processor Reference Manual, Rev. 1
provides a high-level description of features and functionality of the
describes the memory map of the MPC8536E. An overview of the
provides a listing of all the external signals, cross-references for
describes the hard and soft resets, the power-on
I-1

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