MPC8536E-ANDROID Freescale Semiconductor, MPC8536E-ANDROID Datasheet - Page 851

• Manufacturer Part Number: MPC8536E-ANDROID
• Description: HARDWARE/SOFTWARE ANDROID OS
• Manufacturer: Freescale Semiconductor
• Series: PowerQUICC ™r
• Type: MPUr

Specifications of MPC8536E-ANDROID

• Contents: Board
• For Use With/related Products: MPC8536
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

14.5.3.6.31 Transmit Excessive Deferral Packet Counter (TEDF)
Figure 14-85
Table 14-89
14.5.3.6.32 Transmit Single Collision Packet Counter (TSCL)
Figure 14-86
Table 14-90
Freescale Semiconductor
Offset
Reset
Offset
Reset
20–31
20–31
0–19
0–19
Bits
Bits
W
W
R
R
0
0
describes the fields of the TEDF register.
describes the fields of the TSCL register.
Name
Name
TEDF
TSCL
describes the definition for the TEDF register.
describes the definition for the TSCL register.
Figure 14-85. Transmit Excessive Deferral Packet Counter Register Definition
—
—
Figure 14-86. Transmit Single Collision Packet Counter Register Definition
eTSEC1:0x2_46FC;
eTSEC1:0x2_46F8;
eTSEC3:0x2_66FC
eTSEC3:0x2_66F8
MPC8536E PowerQUICC III Integrated Processor Reference Manual, Rev. 1
Reserved
an excessive period of time (3036 byte times).
Reserved
Transmit single collision packet counter. Increments for each frame transmitted which experienced
exactly one collision during transmission.
Transmit excessive deferral packet counter. Increments for frames aborted which were deferred for
Table 14-89. TEDF Field Descriptions
Table 14-90. TSCL Field Descriptions
—
—
All zeros
All zeros
Description
Description
19 20
19 20
Enhanced Three-Speed Ethernet Controllers
TEDF
TSCL
Access: Read/Write
Access: Read/Write
14-103
31
31