MPC8536E-ANDROID Freescale Semiconductor, MPC8536E-ANDROID Datasheet - Page 1152

• Manufacturer Part Number: MPC8536E-ANDROID
• Description: HARDWARE/SOFTWARE ANDROID OS
• Manufacturer: Freescale Semiconductor
• Series: PowerQUICC ™r
• Type: MPUr

Specifications of MPC8536E-ANDROID

• Contents: Board
• For Use With/related Products: MPC8536
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

PCI Express Interface Controller
17.3.8.2.6
The interrupt pin register identifies the legacy interrupt (INTx) messages the device (or function) uses.
17.3.8.2.7
This register does not apply to PCI Express. It is present for legacy purposes.
17-56
Offset 0x3D
Reset
Offset 0x3E (EP-mode only)
Reset
W
W
R
R
Bits
7–0
0
7
7
MIN_GNT Does not apply for PCI Express.
Bits
7–0
Name
PCI Express Interrupt Pin Register—0x3D
PCI Express Minimum Grant Register (EP-Mode Only)—0x3E
Table 17-55. PCI Express Maximum Grant Register Field Description
MPC8536E PowerQUICC III Integrated Processor Reference Manual, Rev. 1
Table 17-54. PCI Express Interrupt Pin Register Field Description
Figure 17-56. PCI Express Maximum Grant Register (MAX_GNT)
Interrupt pin
Name
0
Figure 17-55. PCI Express Interrupt Pin Register
Legacy INTx message used by this device.
0x00 This device does not use legacy interrupt (INTx) messages.
0x01 INTA
0x02 INTB
0x03 INTC
0x04 INTD
all others Reserved.
0
0
Interrupt Pin
MIN_GNT
All zeros
Description
Description
0
0
Freescale Semiconductor
0
Access: Read only
Access: Read only
1
0
0