MPC8536E-ANDROID Freescale Semiconductor, MPC8536E-ANDROID Datasheet - Page 1206

• Manufacturer Part Number: MPC8536E-ANDROID
• Description: HARDWARE/SOFTWARE ANDROID OS
• Manufacturer: Freescale Semiconductor
• Series: PowerQUICC ™r
• Type: MPUr

Specifications of MPC8536E-ANDROID

• Contents: Board
• For Use With/related Products: MPC8536
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

PCI Express Interface Controller
17.4.1.10.3 Error Conditions
Table 17-126
17-110
PCI Express Secondary Status Register[13]
(received master abort) is set
PCI Express Secondary Status Register[14]
(signaled system error) is set.
PCI Express Secondary Status Register[15]
(detected parity error) is set
PCI Express Slot Status Register[0]
(attention button pressed) is set
PCI Express Slot Status Register[1]
(power fault detected) is set
PCI Express Slot Status Register[2]
(MRL sensor changed) is set
PCI Express Slot Status Register[3]
(presence detect changed) is set
PCI Express Slot Status Register[4]
(command completed) is set
Status Register Bit
describes specific error types and the action taken for various transaction types.
Table 17-125. PCI Express Internal Controller Interrupt Sources (continued)
MPC8536E PowerQUICC III Integrated Processor Reference Manual, Rev. 1
PCI Express Secondary Status Interrupt Mask Register[3] (mask received
master abort) is cleared.
PCI Express Secondary Status Interrupt Mask Register[4] (mask signaled
system error) is cleared.
PCI Express Secondary Status Interrupt Mask Register[5] (mask detected
parity error) is cleared.
PCI Express Slot Control Register[0] (attention button pressed enable) is set
and
PCI Express Slot Control Register[5] (hot plug interrupt enable) is set
and
either PCI Express PM Control Register[1–0] = 00 (the function power state
is D0) or PCI Express PM Control Register[8] (PME enable) is set.
PCI Express Slot Control Register[1] (power fault detected enable) is set
and
PCI Express Slot Control Register[5] (hot plug interrupt enable) is set
and
either PCI Express PM Control Register[1–0] = 00 (the function power state
is D0) or PCI Express PM Control Register[8] (PME enable) is set.
PCI Express Slot Control Register[2] (MRL sensor changed enable) is set
and
PCI Express Slot Control Register[5] (hot plug interrupt enable) is set
and
either PCI Express PM Control Register[1–0] = 00 (the function power state
is D0) or PCI Express PM Control Register[8] (PME enable) is set.
PCI Express Slot Control Register[3] (presence detect changed enable) is set
and
PCI Express Slot Control Register[5] (hot plug interrupt enable) is set
and
either PCI Express PM Control Register[1–0] = 00 (the function power state
is D0) or PCI Express PM Control Register[8] (PME enable) is set.
PCI Express Slot Control Register[4] (command completed interrupt enable)
is set
and
PCI Express Slot Control Register[5] (hot plug interrupt enable) is set.
Preconditions
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