MPC8536E-ANDROID Freescale Semiconductor, MPC8536E-ANDROID Datasheet - Page 12

• Manufacturer Part Number: MPC8536E-ANDROID
• Description: HARDWARE/SOFTWARE ANDROID OS
• Manufacturer: Freescale Semiconductor
• Series: PowerQUICC ™r
• Type: MPUr

Specifications of MPC8536E-ANDROID

• Contents: Board
• For Use With/related Products: MPC8536
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Paragraph
Number
9.3.2.3
9.3.2.4
9.3.2.5
9.3.2.6
9.3.3
9.3.3.1
9.3.3.2
9.3.3.3
9.3.3.4
9.3.3.5
9.3.3.6
9.3.3.7
9.3.4
9.3.4.1
9.3.4.2
9.3.4.3
9.3.5
9.3.5.1
9.3.5.2
9.3.5.3
9.3.6
9.3.6.1
9.3.6.2
9.3.6.3
9.3.6.4
9.3.6.5
9.3.7
9.3.7.1
9.3.7.2
9.3.7.3
9.3.7.4
9.3.7.5
9.3.7.6
9.3.8
9.3.8.1
9.3.8.2
9.3.8.3
9.3.8.4
9.3.8.5
xii
IRQ_OUT and Critical Interrupt Summary Registers ............................................... 9-28
Performance Monitor Mask Registers (PMMRs)...................................................... 9-32
Message Registers...................................................................................................... 9-34
Shared Message Signaled Registers .......................................................................... 9-36
Interrupt Source Configuration Registers .................................................................. 9-40
Per-CPU (Private Access) Registers.......................................................................... 9-46
MPC8536E PowerQUICC III Integrated Processor Reference Manual, Rev. 1
Global Timer Base Count Registers (GTBCRA0–GTBCRA3,
Global Timer Vector/Priority Registers (GTVPRA0–GTVPRA3,
Global Timer Destination Registers (GTDRA0–GTDRA3, GTDRB0–GTDRB3) 9-26
Timer Control Registers (TCRA–TCRB).............................................................. 9-27
External Interrupt Summary Register (ERQSR) ................................................... 9-29
IRQ_OUT Summary Register 0 (IRQSR0) ........................................................... 9-29
IRQ_OUT Summary Register 1 (IRQSR1) ........................................................... 9-30
IRQ_OUT Summary Register 2 (IRQSR2) ........................................................... 9-31
Critical Interrupt Summary Register 0 (CISR0).................................................... 9-31
Critical Interrupt Summary Register 1 (CISR1).................................................... 9-32
Critical Interrupt Summary Register 2 (CISR2).................................................... 9-32
Performance Monitor Mask Registers 0 (PM0MR0–PM3MR0) .......................... 9-33
Performance Monitor Mask Registers 1 (PM0MR1–PM3MR1) .......................... 9-34
Performance Monitor Mask Registers 2 (PM0MR2–PM3MR2) .......................... 9-34
Message Registers (MSGR0–MSGR7) ................................................................. 9-35
Message Enable Register (MER)........................................................................... 9-35
Message Status Register (MSR) ............................................................................ 9-36
Shared Message Signaled Interrupt Registers (MSIR0–MSIR7) .......................... 9-37
Shared Message Signaled Interrupt Status Register (MSISR)............................... 9-37
Shared Message Signaled Interrupt Index Register (MSIIR) ................................ 9-38
Shared Message Signaled Interrupt Vector/Priority Register (MSIVPRs) ............ 9-38
Shared Message Signaled Interrupt Destination Registers 0–7 (MSIDRn)........... 9-39
External Interrupt Vector/Priority Registers (EIVPR0–EIVPR11) ....................... 9-41
External Interrupt Destination Registers (EIDR0–EIDR11) ................................. 9-42
Internal Interrupt Vector/Priority Registers (IIVPRn) ........................................... 9-43
Internal Interrupt Destination Registers (IIDRn)................................................... 9-44
Messaging Interrupt Vector/Priority Registers (MIVPRn) .................................... 9-45
Messaging Interrupt Destination Registers (MIDR0–MIDR7) ............................. 9-46
Interprocessor Interrupt Dispatch Register (IPIDR0–IPIDR3) ............................. 9-48
Processor Core Current Task Priority Registers 0–1 (CTPR0–CTPR1) ............... 9-49
Who Am I Registers 0–1 (WHOAMI0–WHOAMI1) ........................................... 9-50
Processor Core Interrupt Acknowledge Registers 0–1 (IACK0–IACK1)............. 9-50
Processor Core End of Interrupt Registers (EOI0–EOI1) ..................................... 9-51
GTBCRB0–GTBCRB3)..................................................................................... 9-25
GTVPRB0–GTVPRB3) ..................................................................................... 9-25
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Freescale Semiconductor
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