MPC8536E-ANDROID Freescale Semiconductor, MPC8536E-ANDROID Datasheet - Page 33

• Manufacturer Part Number: MPC8536E-ANDROID
• Description: HARDWARE/SOFTWARE ANDROID OS
• Manufacturer: Freescale Semiconductor
• Series: PowerQUICC ™r
• Type: MPUr

Specifications of MPC8536E-ANDROID

• Contents: Board
• For Use With/related Products: MPC8536
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Paragraph
Number
16.4.2
16.4.2.1
16.4.2.2
16.4.2.3
16.4.2.3.1
16.4.2.3.2
16.4.2.3.3
16.4.2.4
16.4.2.5
16.4.2.6
16.4.2.7
16.4.2.7.1
16.4.2.7.2
16.4.2.8
16.4.2.8.1
16.4.2.8.2
16.4.2.9
16.4.2.10
16.4.2.11
16.4.2.11.1
16.4.2.11.2
16.4.2.11.3
16.4.2.11.4
16.4.2.11.5
16.4.2.12
16.4.2.12.1
16.4.2.12.2
16.4.2.13
16.4.2.13.1
16.4.2.13.2
16.5
16.5.1
16.5.1.1
16.5.1.2
16.5.1.3
16.5.2
16.5.2.1
Freescale Semiconductor
Initialization/Application Information ......................................................................... 16-67
PCI Bus Protocol ..................................................................................................... 16-45
Power-On Reset Configuration Modes.................................................................... 16-67
Byte Ordering .......................................................................................................... 16-69
MPC8536E PowerQUICC III Integrated Processor Reference Manual, Rev. 1
Basic Transfer Control......................................................................................... 16-45
PCI Bus Commands............................................................................................. 16-46
Addressing ........................................................................................................... 16-47
Device Selection .................................................................................................. 16-48
Byte Alignment.................................................................................................... 16-49
Bus Driving and Turnaround ............................................................................... 16-49
PCI Bus Transactions........................................................................................... 16-50
Transaction Termination ...................................................................................... 16-52
Fast Back-to-Back Transactions .......................................................................... 16-56
Dual Address Cycles............................................................................................ 16-56
Configuration Cycles ........................................................................................... 16-58
Other Bus Transactions........................................................................................ 16-63
PCI Error Functions............................................................................................. 16-65
Host Mode ........................................................................................................... 16-68
Agent Mode ......................................................................................................... 16-68
Agent Configuration Lock Mode......................................................................... 16-68
Byte Order for Configuration Transactions ......................................................... 16-70
Memory Space Addressing.............................................................................. 16-47
I/O Space Addressing ...................................................................................... 16-48
Configuration Space Addressing ..................................................................... 16-48
PCI Read Transactions .................................................................................... 16-50
PCI Write Transactions.................................................................................... 16-51
Master-Initiated Termination ........................................................................... 16-52
Target-Initiated Termination ............................................................................ 16-53
PCI Configuration Space Header .................................................................... 16-58
Host Accessing the PCI Configuration Space ................................................. 16-60
Agent Accessing the PCI Configuration Space ............................................... 16-61
PCI Type 0 Configuration Translation............................................................. 16-62
Type 1 Configuration Translation.................................................................... 16-63
Interrupt-Acknowledge Transactions .............................................................. 16-63
Special-Cycle Transactions ............................................................................. 16-64
PCI Parity ........................................................................................................ 16-65
Error Reporting................................................................................................ 16-66
PCI Express Interface Controller
Contents
Chapter 17
Title
Number
Page
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