MPC8536E-ANDROID Freescale Semiconductor, MPC8536E-ANDROID Datasheet - Page 1126

• Manufacturer Part Number: MPC8536E-ANDROID
• Description: HARDWARE/SOFTWARE ANDROID OS
• Manufacturer: Freescale Semiconductor
• Series: PowerQUICC ™r
• Type: MPUr

Specifications of MPC8536E-ANDROID

• Contents: Board
• For Use With/related Products: MPC8536
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

PCI Express Interface Controller
17.3.6
17.3.6.1
The PCI Express error detect register, shown in
by hardware.The detected error bits are write-1-to-clear type registers. Reading from these registers occurs
normally; however, write operations can clear but not set bits. A bit is cleared whenever the register is
written, and the data in the corresponding bit location is a 1. For example, to clear bit 6 and not affect any
other bits in the register, the value 0b0200_0000 is written to the register. When an error is detected the
appropriate error bit is set. Subsequent errors sets the appropriate error bits in the error detection registers,
but only the first error for a particular unit have any relevant information captured. The interrupt enable
bits are used to allow or block the error reporting to the interrupt mechanism while the disable bits are used
to prevent or allow the setting of the status bits.
17-30
Offset 0xE00
Reset
Reset
20–25
26–31
Bits
W w1c
W w1c
R
R CRST MIS
Table 17-22. PCI Express Inbound Window Attributes Registers Field Descriptions (continued)
ME
16
0
Name
IWS
—
PCI Express Error Management Registers
w1c
PCI Express Error Detect Register (PEX_ERR_DR)
17
1
Reserved
Inbound window size. Inbound translation window size N which is the encoded 2
The smallest window size is 4 Kbytes. For EP mode, this field directly controls the size of the BARs.
000000
...
001010
001011
001100
...
011111
100000
100001
100010
100011
100100
...
111111
IOIS
w1c
MPC8536E PowerQUICC III Integrated Processor Reference Manual, Rev. 1
18
Figure 17-24. PCI Express Error Detect Register (PEX_ERR_DR)
w1c
Reserved
CIS
Reserved
4-Kbyte window size
8-Kbyte window size
4-Gbyte window size
8-Gbyte window size
16-Gbyte window size
32-Gbyte window size
64-Gbyte window size
Reserved
Reserved
19
CIEP IOIEP OAC
w1c
—
20
w1c
21
w1c
22
Figure
IOIA
w1c
23
7
All zeros
All zeros
Description
17-24, contains error status bits that are detected
PCT
w1c
24
8
—
9
PCAC PNM CDNSC CRSNC ICCA IACA
w1c
10
w1c
11
—
w1c
12
(N + 1)
Freescale Semiconductor
-bytes window size.
w1c
13
Access: w1c
w1c
14
w1c
15
31