MPC8536E-ANDROID Freescale Semiconductor, MPC8536E-ANDROID Datasheet - Page 1344

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MPC8536E-ANDROID

Manufacturer Part Number
MPC8536E-ANDROID
Description
HARDWARE/SOFTWARE ANDROID OS
Manufacturer
Freescale Semiconductor
Series
PowerQUICC ™r
Type
MPUr

Specifications of MPC8536E-ANDROID

Contents
Board
For Use With/related Products
MPC8536
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Universal Serial Bus Interfaces
Table 21-7
21.3.1.6
This register is not defined in the EHCI specification. This register describes the overall host/device
capability of the USB module.
Table 21-8
21.3.2
The operational registers are comprised of dynamic control or status registers that may be read-only,
read/write, or read/write-1-to-clear. The following sections define the operational registers.
21-10
Offset 0x124
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
31–9
15–0
Bits
6–5
4–0
Bits
8
7
W
R
31
Name
DEN
HC
DC
DCIVERSION
provides bit descriptions for the DCIVERSION register.
provides bit descriptions for the DCCPARAMS register.
Operational Registers
Device Controller Capability Parameters (DCCPARAMS)—Non-EHCI
Name
Reserved, should be cleared.
Host capable. Always 1, indicating the USB controller can operate as an EHCI compatible USB 2.0 host.
Device capable. Always 1, indicating the USB controller can operate as an USB 2.0 device.
1 Device capability
0 No device capability (host only)
Reserved, should be cleared.
Device endpoint number. Indicates the number of endpoints built into the device controller. Always 0x6.
MPC8536E PowerQUICC III Integrated Processor Reference Manual, Rev. 1
Figure 21-7. Device Control Capability Parameters (DCCPARAMS)
Device interface revision number.
Table 21-8. DCCPARAMS Register Field Descriptions
Table 21-7. DCIVERSION Register Field Descriptions
Figure 21-7
shows the DCCPARAMS register.
Description
Description
9
HC DC
1
8
1
7
0 0
6
5
Freescale Semiconductor
0
4
Access: Read-only
0
DEN
1
1
0
0

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