MPC8536E-ANDROID Freescale Semiconductor, MPC8536E-ANDROID Datasheet - Page 450

• Manufacturer Part Number: MPC8536E-ANDROID
• Description: HARDWARE/SOFTWARE ANDROID OS
• Manufacturer: Freescale Semiconductor
• Series: PowerQUICC ™r
• Type: MPUr

Specifications of MPC8536E-ANDROID

• Contents: Board
• For Use With/related Products: MPC8536
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Security Engine (SEC) 3.0
10.3.1
SEC descriptors are designed so that a single descriptor supports the cryptographic computation of a single
packet. SEC descriptors have a fixed length of 64 bytes, that is, eight 64-bit words (referred to as dwords).
A descriptor consists of one header dword and seven “pointer dwords,” as seen in
As shown in
and descriptor feedback fields, respectively. The descriptor control field of the header dword specifies the
security operation to be performed, the execution unit(s) needed, and the modes for each execution unit.
The descriptor feedback field is written to by the security engine upon completion of descriptor processing,
when the “channel done writeback” feature is enabled. Further details about the header dword may be
found in
The pointer dwords, all of which have the same format, contain pointer and length information for locating
input or output parcels (such as keys, context, or text data). The large number of pointers provided in the
descriptor allows for multi-algorithm operations that require fetching of multiple keys, as well as fetch and
return of contexts. Any pointer dword that is not needed may be assigned a length of zero. Further details
about the pointer dwords may be found in
SEC descriptors include scatter/gather capability, which means that each pointer in a descriptor can be
either a direct pointer to a contiguous parcel of data, or a pointer to a “link table” which is a list of pointers
and lengths used to assemble the parcel. When a link table is used to read input data, this is referred to as
a “gather” operation; when used to write output data, it is referred to as a “scatter” operation. Further
details about scatter/gather capability may be found in
10.3.2
Descriptors are created by the host to guide the SEC through required cryptographic operations. The
header dword provides the primary indication of the operations to be performed, the mode for each
operation, and internal addressing used by the controller and channel for internal data movement. The
fields that must be supplied to SEC are shown in the “Field” rows of
Table
operation.
10-20
Pointer Dword 0
Pointer Dword 1
Pointer Dword 2
Pointer Dword 3
Pointer Dword 4
Pointer Dword 5
Pointer Dword 6
Header Dword
10-4. The SEC device drivers allow the host to create proper headers for each cryptographic
Section 10.3.2, “Descriptor Format: Header
Descriptor Structure
Descriptor Format: Header Dword
Figure
MPC8536E PowerQUICC III Integrated Processor Reference Manual, Rev. 1
10-2, the first and second halves of the header dword are denoted as descriptor control
0
Length0
Length1
Length2
Length3
Length4
Length5
Length6
Descriptor Control
15 16
Figure 10-2. Descriptor Format
J0 Extent0
J1 Extent1
J2 Extent2
J3 Extent3
J4 Extent4
J5 Extent5
J6 Extent6
17
Section 10.3.3, “Descriptor Format: Pointer
23 2427 28 31 32
—
—
—
—
—
—
—
Dword.”
Eptr0
Eptr1
Eptr2
Eptr3
Eptr4
Eptr5
Eptr6
Section 10.3.4, “Link Table
Figure 10-3
Descriptor Feedback
Pointer0
Pointer1
Pointer2
Pointer3
Pointer4
Pointer5
Pointer6
and described in
Figure
Format.”
Freescale Semiconductor
Dwords.”
10-2.
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