MPC8536E-ANDROID Freescale Semiconductor, MPC8536E-ANDROID Datasheet - Page 843

• Manufacturer Part Number: MPC8536E-ANDROID
• Description: HARDWARE/SOFTWARE ANDROID OS
• Manufacturer: Freescale Semiconductor
• Series: PowerQUICC ™r
• Type: MPUr

Specifications of MPC8536E-ANDROID

• Contents: Board
• For Use With/related Products: MPC8536
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

14.5.3.6.15 Receive Unknown Opcode Packet Counter (RXUO)
Figure 14-69
Table 14-73
14.5.3.6.16 Receive Alignment Error Counter (RALN)
Figure 14-70
Table 14-74
Freescale Semiconductor
16–31
16–31
0–15
0–15
Bits
Bits
Offset eTSEC1:0x2_46B8;
Reset
Offset eTSEC1:0x2_46BC;
Reset
W
W
R
R
RXUO
Name
eTSEC3:0x2_66BC
eTSEC3:0x2_66B8
Name
RALN
0
0
—
—
describes the fields of the RXUO register.
describes the fields of the RALN register.
describes the definition for the RXUO register.
describes the definition for the RALN register.
Figure 14-69. Receive Unknown OPCode Packet Counter Register Definition
Reserved
Receive unknown opcode counter. Increments each time a MAC control frame is received which contains
an opcode other than PAUSE, but the frame has valid CRC and length 64 to 1518 (non VLAN) or 1522
(VLAN).
Reserved
(VLAN) which contains an invalid FCS and is not an integral number of bytes.
Receive alignment error counter. Increments for each received frame from 64 to 1518 (non VLAN) or 1522
MPC8536E PowerQUICC III Integrated Processor Reference Manual, Rev. 1
Figure 14-70. Receive Alignment Error Counter Register Definition
—
—
Table 14-73. RXUO Field Descriptions
Table 14-74. RALN Field Descriptions
All zeros
All zeros
15 16
15 16
Description
Description
Enhanced Three-Speed Ethernet Controllers
RXUO
RALN
Access: Read/Write
Access: Read/Write
14-95
31
31