MPC8536E-ANDROID Freescale Semiconductor, MPC8536E-ANDROID Datasheet - Page 262

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MPC8536E-ANDROID

Manufacturer Part Number
MPC8536E-ANDROID
Description
HARDWARE/SOFTWARE ANDROID OS
Manufacturer
Freescale Semiconductor
Series
PowerQUICC ™r
Type
MPUr

Specifications of MPC8536E-ANDROID

Contents
Board
For Use With/related Products
MPC8536
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
III-2
a seamless interface to many types of memory devices and peripherals. The memory controller
controls eight memory banks shared by a general-purpose chip-select machine (GPCM), a NAND
flash control machine (FCM), and up to three user-programmable machines (UPMs). As such, it
supports a minimal glue logic interface to SRAM, EPROM, Flash EPROM, burstable RAM,
regular DRAM devices, extended data output DRAM devices, and other peripherals.
Chapter 14, “Enhanced Three-Speed Ethernet Controllers,”
three-speed Ethernet controllers. These controllers support 10/100/1Gb Ethernet with a complete
set of media-independent interface options including MII, RMII, GMII, RGMII, SGMII, TBI, and
RTBI. Each controller provides very high throughput using a captive DMA channel and direct
connection to the memory coherency module. The controllers provide two full-duplex FIFO
interface modes and quality of service support and are backward compatible with PowerQUICC III
TSEC controllers.
Chapter 15, “DMA Controller,”
MPC8536E. The DMA controller transfers blocks of data independent of the e500v2 core or
external hosts. Data movement occurs among the local address space. The DMA controller has four
high-speed channels. Both the e500 core and external masters can initiate a DMA transfer. All
channels are capable of complex data movement and advanced transaction chaining.
Chapter 16, “PCI Bus Interface,”
Bus Specification, Rev. 2.3. This chapter provides a basic description of PCI bus operations. The
specific emphasis is directed at how this device implements the PCI specification.
Chapter 17, “PCI Express Interface Controller,”
MPC8536E. Each controller is compliant with the PCI Express Base Specification Revision 1.0a.
The physical layer of these controllers operate at 2.5 Gbaud per lane. Configuration options allow
multiple width configurations among the three controllers.
Chapter 18, “Enhanced Serial Peripheral Interface,”
which allows data exchange between MPC85xx family devices. It can also be used to communicate
with peripheral devices such as EEPROMs, real-time clocks, A/D converters, and ISDN devices.
Chapter 19, “SATA Controller,”
Chapter 20, “Enhanced Secure Digital Host Controller,”
Controller, which provides an interface between the host system and SD and MMC cards. It
provides a functional description of the major system blocks and includes command information
for the host.
Chapter 21, “Universal Serial Bus Interfaces,”
interfaces. The USB module is a USB 2.0-compliant serial interface engine for implementing a
USB interface. The registers and data structures are based on the Enhanced Host Controller
Interface Specification for Universal Serial Bus (EHCI) from Intel Corporation. The USB
dual-role modules can act as a host or as a device on the USB bus.
Chapter 22, “General Purpose I/O (GPIO),”
of the MPC8536E.
MPC8536E PowerQUICC III Integrated Processor Reference Manual, Rev. 1
describes the four-channel general-purpose DMA controller of the
describes the serial ATA controllers of the MPC8536E.
describes the PCI interface, which complies with the PCI Local
describes the general-purpose input and output signals
describes the three universal serial bus (USB)
describes the three PCI Express controllers of the
describes the serial peripheral interface (SPI),
describes the enhanced SD Host
describes the two enhanced
Freescale Semiconductor

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