MPC8536E-ANDROID Freescale Semiconductor, MPC8536E-ANDROID Datasheet - Page 67

• Manufacturer Part Number: MPC8536E-ANDROID
• Description: HARDWARE/SOFTWARE ANDROID OS
• Manufacturer: Freescale Semiconductor
• Series: PowerQUICC ™r
• Type: MPUr

Specifications of MPC8536E-ANDROID

• Contents: Board
• For Use With/related Products: MPC8536
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

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Freescale Semiconductor
Transmit Broadcast Packet Counter Register Definition .................................................. 14-101
Transmit Pause Control Frame Counter Register Definition ............................................ 14-102
Transmit Deferral Packet Counter Register Definition..................................................... 14-102
Transmit Excessive Deferral Packet Counter Register Definition.................................... 14-103
Transmit Single Collision Packet Counter Register Definition ........................................ 14-103
Transmit Multiple Collision Packet Counter Register Definition..................................... 14-104
Transmit Late Collision Packet Counter Register Definition ........................................... 14-104
Transmit Excessive Collision Packet Counter Register Definition .................................. 14-105
Transmit Total Collision Counter Register Definition ...................................................... 14-105
Transmit Drop Frame Counter Register Definition .......................................................... 14-106
Transmit Jabber Frame Counter Register Definition ........................................................ 14-106
Transmit FCS Error Counter Register Definition ............................................................. 14-107
Transmit Control Frame Counter Register Definition ...................................................... 14-107
Transmit Oversized Frame Counter Register Definition .................................................. 14-108
Transmit Undersize Frame Counter Register Definition .................................................. 14-108
Transmit Fragment Counter Register Definition .............................................................. 14-109
Carry Register 1 (CAR1) Register Definition................................................................... 14-109
Carry Register 2 (CAR2) Register Definition....................................................................14-111
Carry Mask Register 1 (CAM1) Register Definition........................................................ 14-112
Carry Mask Register 2 (CAM2) Register Definition........................................................ 14-113
Receive Filer Rejected Packet Counter Register Definition ............................................. 14-114
IGADDRn Register Definition ......................................................................................... 14-115
GADDRn Register Definition........................................................................................... 14-116
FIFOCFG Register Definition .......................................................................................... 14-117
ATTR Register Definition ................................................................................................. 14-118
ATTRELI Register Definition........................................................................................... 14-119
RQPRM Register Definition ............................................................................................. 14-120
RFBPTR0–RFBPTR7 Register Definition........................................................................ 14-121
TMR_CTRL Register Definition ...................................................................................... 14-122
TMR_TEVENT Register Definition................................................................................. 14-124
TMR_PEVENT Register Definition ................................................................................. 14-127
TMR_PEMASK Register Definition ................................................................................ 14-127
TMR_CNT_H Register Definition ................................................................................... 14-129
TMR_ADD Register Definition........................................................................................ 14-129
TMR_ACC Register Definition ........................................................................................ 14-130
TMR_PRSC Register Definition ...................................................................................... 14-130
TMROFF_H/L Register Definition .................................................................................. 14-131
TMR_ALARM1-2_H/L Register Definition .................................................................... 14-131
TMR_FIPERn Register Definition ................................................................................... 14-133
TMR_ETTS1-2_H/L Register Definition ......................................................................... 14-133
Control Register Definition............................................................................................... 14-136
MPC8536E PowerQUICC III Integrated Processor Reference Manual, Rev. 1
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