MPC8536E-ANDROID Freescale Semiconductor, MPC8536E-ANDROID Datasheet - Page 13

• Manufacturer Part Number: MPC8536E-ANDROID
• Description: HARDWARE/SOFTWARE ANDROID OS
• Manufacturer: Freescale Semiconductor
• Series: PowerQUICC ™r
• Type: MPUr

Specifications of MPC8536E-ANDROID

• Contents: Board
• For Use With/related Products: MPC8536
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Paragraph
Number
9.4
9.4.1
9.4.1.1
9.4.1.2
9.4.1.2.1
9.4.1.2.2
9.4.1.2.3
9.4.1.2.4
9.4.2
9.4.3
9.4.4
9.4.5
9.4.6
9.4.7
9.4.8
9.4.8.1
9.5
9.5.1
9.5.1.1
9.5.1.2
10.1
10.1.1
10.1.2
10.1.3
10.1.4
10.1.4.1
10.1.4.1.1
10.1.4.1.2
10.1.4.2
10.1.4.3
10.1.4.4
10.1.4.5
10.1.4.6
10.1.4.7
10.1.4.8
10.2
10.3
Freescale Semiconductor
Functional Description................................................................................................... 9-52
Initialization/Application Information ........................................................................... 9-58
SEC Architecture Overview .......................................................................................... 10-3
Configuration of Internal Memory Space .................................................................... 10-11
Descriptors ................................................................................................................... 10-19
Flow of Interrupt Control........................................................................................... 9-52
Interprocessor Interrupts ............................................................................................ 9-55
Message Interrupts..................................................................................................... 9-56
Shared Message Signaled Interrupts.......................................................................... 9-56
PCI Express INTx/IRQn Sharing .............................................................................. 9-56
Global Timers ............................................................................................................ 9-57
Resets ......................................................................................................................... 9-57
Resetting the PIC ....................................................................................................... 9-58
Programming Guidelines ........................................................................................... 9-58
Descriptor Overview.................................................................................................. 10-4
Polychannel Overview............................................................................................... 10-5
Controller Overview .................................................................................................. 10-6
Execution Units (EUs) Overview .............................................................................. 10-7
MPC8536E PowerQUICC III Integrated Processor Reference Manual, Rev. 1
Interrupts Routed to cint or IRQ_OUT.................................................................. 9-52
Interrupts Routed to int.......................................................................................... 9-52
PIC Registers ......................................................................................................... 9-58
Changing Interrupt Source Configuration ............................................................. 9-60
Public Key Execution Unit (PKEU) ...................................................................... 10-7
Data Encryption Standard Execution Unit (DEU)................................................. 10-8
Advanced Encryption Standard Execution Unit (AESU)...................................... 10-9
Arc Four Execution Unit (AFEU) ....................................................................... 10-10
Message Digest Execution Unit (MDEU) ........................................................... 10-10
Kasumi Execution Unit (KEU)............................................................................ 10-10
Cyclical Redundancy Check Unit (CRCU) ......................................................... 10-10
Random Number Generator Unit (RNGU).......................................................... 10-11
Processor Core Initialization.................................................................................. 9-58
Interrupt Source Priority.................................................................................... 9-54
Interrupt Acknowledge ...................................................................................... 9-54
Spurious Vector Generation............................................................................... 9-55
Nesting of Interrupts.......................................................................................... 9-55
Elliptic Curve Operations .................................................................................. 10-7
Modular Exponentiation Operations ................................................................. 10-8
Security Engine (SEC) 3.0
Contents
Chapter 10
Title
Number
Page
xiii