MPC555CME Freescale Semiconductor, MPC555CME Datasheet - Page 946

KIT EVALUATION FOR MPC555

MPC555CME

Manufacturer Part Number
MPC555CME
Description
KIT EVALUATION FOR MPC555
Manufacturer
Freescale Semiconductor
Type
Microcontrollerr
Datasheet

Specifications of MPC555CME

Contents
Module Board, Installation Guide, Power Supply, Cable, Software and more
Processor To Be Evaluated
MPC555
Data Bus Width
32 bit
Interface Type
RS-232
For Use With/related Products
MPC555
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
G.21.4 MPIOSM Timing Characteristics
MPC555 / MPC556
USER’S MANUAL
MPIOSM Input Pin Period
MPIOSM Pin Low Time
MPIOSM Pin High Time
Input Pin to MPIOSM_DR Delay
Output Pulse Width
NOTES:
1. The minimum input pin period, pin low and pin high times depend on the rate at which the MPIOSM_DR reg-
2. The minimum output pulse width depends on how quickly the CPU updates the value inside the
MPIOSM input pins
ister is polled.
MIOPSM_DR register. The MPC555 RCPU core takes six clock cycles to access the MIOPSM_DR register,
therefore the minimum output pulse will be 12 IMB clocks.
MPIOSM_DR
Figure G-50 MPIOSM Input Pin to MPIOSM_DR (Data Register)
Characteristic
2
f
SYS
Table G-25 MPIOSM Timing Characteristics
FFA5
ELECTRICAL CHARACTERISTICS
(All delays are in IMB clock periods.)
Rev. 15 October 2000
FFA5
Timing Diagram
t
PDR
Output Mode
Input Mode
Symbol
t
t
t
t
PULW
PPER
t
PDR
PLO
PHI
005A
005A
Min
0
1
1
1
2
Max
1
MOTOROLA
G-68

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