MPC555CME Freescale Semiconductor, MPC555CME Datasheet - Page 350

• Manufacturer Part Number: MPC555CME
• Description: KIT EVALUATION FOR MPC555
• Manufacturer: Freescale Semiconductor
• Type: Microcontrollerr

Specifications of MPC555CME

• Contents: Module Board, Installation Guide, Power Supply, Cable, Software and more
• Processor To Be Evaluated: MPC555
• Data Bus Width: 32 bit
• Interface Type: RS-232
• For Use With/related Products: MPC555
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

9.5.13 Show Cycle Transactions
MPC555
USER’S MANUAL
Note: the delay for the internal to external cycle may be one clock or greater.
CLKOUT
BR
BG (output)
BB
ADDR[0:31]
RD/WR
TSIZ[0:1]
BURST
TS
Data
TA
RETRY(output)
Show cycles are accesses to the CPU’s internal bus devices. These accesses are
driven externally for emulation, visibility, and debugging purposes. A show cycle can
have one address phase and one data phase, or just an address phase in the case of
instruction show cycles. The cycle can be a write or a read access. The data for both
the read and write accesses should be driven by the bus master. (This is different from
normal bus read and write accesses.) The address and data of the show cycle must
each be valid on the bus for one clock. The data phase must not require a transfer ac-
/
MPC556
Figure 9-39 Retry of External Master Access (Internal Arbiter)
ADDR (ext)ernal
EXTERNAL BUS INTERFACE
O
Rev. 15 October 2000
Allow Internal
Access to Gain the
Bus
ADDR (internal)
MOTOROLA
9-54