MPC555CME Freescale Semiconductor, MPC555CME Datasheet - Page 645

• Manufacturer Part Number: MPC555CME
• Description: KIT EVALUATION FOR MPC555
• Manufacturer: Freescale Semiconductor
• Type: Microcontrollerr

Specifications of MPC555CME

• Contents: Module Board, Installation Guide, Power Supply, Cable, Software and more
• Processor To Be Evaluated: MPC555
• Data Bus Width: 32 bit
• Interface Type: RS-232
• For Use With/related Products: MPC555
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

18.3.1 DPTRAM Module Configuration Register (DPTMCR)
MPC555
USER’S MANUAL
Supv R/W
Test
Supv R/W
Supv Read Only
Supv Read Only
Supv Read Only
dress Map
map.
The DPTRAM array occupies the 6-Kbyte block. In the MPC555 / MPC556, the array
must be located at the address 0x30 2000. Refer to
This register defines the basic configuration of the DPTRAM module. The DPTMCR
contains bits to configure the DPT RAM module for stop operation and for proper ac-
cess rights to the array. The register also contains the MISC control bits.
Access
R/W
/
MPC556
to locate the DPTRAM control block in the MPC555 / MPC556 address
0x30 000A
0x30 0000
0x30 0002
0x30 0004
0x30 0006
0x30 0008
Address
0x30 37FF
0x30 2000
Figure 18-2 DPTRAM Memory Map
Table 18-1 DPTRAM Register Map
DPT RAM Module Configuration Register (DPTRMCR)
See
Test Configuration Register (DPTTCR)
RAM Base Address Register (RAMBAR)
See
Multiple Input Signature Register High (MISRH)
See
for bit descriptions.
Multiple Input Signature Register Low (MISRL)
See
for bit descriptions.
Multiple Input Signature Counter (MISCNT)
See
DUAL-PORT TPU RAM (DPTRAM)
Table 18-2
Table 18-3
18.3.4 MISR High (MISRH) and MISR Low (MISRL)
18.3.4 MISR High (MISRH) and MISR Low (MISRL)
18.3.5 MISC Counter (MISCNT)
Rev. 15 October 2000
DPTRAM Array
(6 Kbytes)
for bit descriptions.
for bit descriptions.
Register
Figure 1-3
for bit descriptions.
and
Figure
Last memory
Reset Value
address
0x0100
0x0000
0x0001
0x0000
0x0000
MOTOROLA
18-2.
18-3